73 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			73 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| /*
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|  * LPC variant I/O for Microchip EC
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|  *
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|  * Copyright (C) 2016 Google, Inc
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|  */
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| 
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| #ifndef __CROS_EC_LPC_MEC_H
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| #define __CROS_EC_LPC_MEC_H
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| 
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| enum cros_ec_lpc_mec_emi_access_mode {
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| 	/* 8-bit access */
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| 	ACCESS_TYPE_BYTE = 0x0,
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| 	/* 16-bit access */
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| 	ACCESS_TYPE_WORD = 0x1,
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| 	/* 32-bit access */
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| 	ACCESS_TYPE_LONG = 0x2,
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| 	/*
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| 	 * 32-bit access, read or write of MEC_EMI_EC_DATA_B3 causes the
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| 	 * EC data register to be incremented.
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| 	 */
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| 	ACCESS_TYPE_LONG_AUTO_INCREMENT = 0x3,
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| };
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| 
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| enum cros_ec_lpc_mec_io_type {
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| 	MEC_IO_READ,
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| 	MEC_IO_WRITE,
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| };
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| 
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| /* EMI registers are relative to base */
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| #define MEC_EMI_HOST_TO_EC(MEC_EMI_BASE)	((MEC_EMI_BASE) + 0)
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| #define MEC_EMI_EC_TO_HOST(MEC_EMI_BASE)	((MEC_EMI_BASE) + 1)
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| #define MEC_EMI_EC_ADDRESS_B0(MEC_EMI_BASE)	((MEC_EMI_BASE) + 2)
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| #define MEC_EMI_EC_ADDRESS_B1(MEC_EMI_BASE)	((MEC_EMI_BASE) + 3)
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| #define MEC_EMI_EC_DATA_B0(MEC_EMI_BASE)	((MEC_EMI_BASE) + 4)
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| #define MEC_EMI_EC_DATA_B1(MEC_EMI_BASE)	((MEC_EMI_BASE) + 5)
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| #define MEC_EMI_EC_DATA_B2(MEC_EMI_BASE)	((MEC_EMI_BASE) + 6)
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| #define MEC_EMI_EC_DATA_B3(MEC_EMI_BASE)	((MEC_EMI_BASE) + 7)
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| 
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| /**
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|  * cros_ec_lpc_mec_init() - Initialize MEC I/O.
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|  *
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|  * @base: MEC EMI Base address
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|  * @end: MEC EMI End address
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|  */
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| void cros_ec_lpc_mec_init(unsigned int base, unsigned int end);
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| 
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| /**
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|  * cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range.
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|  *
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|  * @offset: Address offset
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|  * @length: Number of bytes to check
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|  *
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|  * Return: 1 if in range, 0 if not, and -EINVAL on failure
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|  *         such as the mec range not being initialized
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|  */
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| int cros_ec_lpc_mec_in_range(unsigned int offset, unsigned int length);
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| 
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| /**
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|  * cros_ec_lpc_io_bytes_mec - Read / write bytes to MEC EMI port
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|  *
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|  * @io_type: MEC_IO_READ or MEC_IO_WRITE, depending on request
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|  * @offset:  Base read / write address
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|  * @length:  Number of bytes to read / write
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|  * @buf:     Destination / source buffer
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|  *
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|  * @return 8-bit checksum of all bytes read / written
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|  */
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| u8 cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type,
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| 			    unsigned int offset, unsigned int length, u8 *buf);
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| 
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| #endif /* __CROS_EC_LPC_MEC_H */
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