189 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			189 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support
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|  *
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|  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
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|  * Authors: Kamil Debski <k.debski@samsung.com>
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|  */
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| 
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| #include <linux/delay.h>
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| #include <linux/io.h>
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| #include <linux/phy/phy.h>
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| #include "phy-samsung-usb2.h"
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| 
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| /* Exynos USB PHY registers */
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| 
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| /* PHY power control */
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| #define S5PV210_UPHYPWR			0x0
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| 
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| #define S5PV210_UPHYPWR_PHY0_SUSPEND	BIT(0)
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| #define S5PV210_UPHYPWR_PHY0_PWR	BIT(3)
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| #define S5PV210_UPHYPWR_PHY0_OTG_PWR	BIT(4)
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| #define S5PV210_UPHYPWR_PHY0	( \
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| 	S5PV210_UPHYPWR_PHY0_SUSPEND | \
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| 	S5PV210_UPHYPWR_PHY0_PWR | \
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| 	S5PV210_UPHYPWR_PHY0_OTG_PWR)
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| 
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| #define S5PV210_UPHYPWR_PHY1_SUSPEND	BIT(6)
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| #define S5PV210_UPHYPWR_PHY1_PWR	BIT(7)
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| #define S5PV210_UPHYPWR_PHY1 ( \
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| 	S5PV210_UPHYPWR_PHY1_SUSPEND | \
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| 	S5PV210_UPHYPWR_PHY1_PWR)
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| 
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| /* PHY clock control */
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| #define S5PV210_UPHYCLK			0x4
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| 
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| #define S5PV210_UPHYCLK_PHYFSEL_MASK	(0x3 << 0)
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| #define S5PV210_UPHYCLK_PHYFSEL_48MHZ	(0x0 << 0)
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| #define S5PV210_UPHYCLK_PHYFSEL_24MHZ	(0x3 << 0)
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| #define S5PV210_UPHYCLK_PHYFSEL_12MHZ	(0x2 << 0)
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| 
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| #define S5PV210_UPHYCLK_PHY0_ID_PULLUP	BIT(2)
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| #define S5PV210_UPHYCLK_PHY0_COMMON_ON	BIT(4)
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| #define S5PV210_UPHYCLK_PHY1_COMMON_ON	BIT(7)
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| 
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| /* PHY reset control */
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| #define S5PV210_UPHYRST			0x8
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| 
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| #define S5PV210_URSTCON_PHY0		BIT(0)
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| #define S5PV210_URSTCON_OTG_HLINK	BIT(1)
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| #define S5PV210_URSTCON_OTG_PHYLINK	BIT(2)
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| #define S5PV210_URSTCON_PHY1_ALL	BIT(3)
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| #define S5PV210_URSTCON_HOST_LINK_ALL	BIT(4)
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| 
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| /* Isolation, configured in the power management unit */
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| #define S5PV210_USB_ISOL_OFFSET		0x680c
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| #define S5PV210_USB_ISOL_DEVICE		BIT(0)
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| #define S5PV210_USB_ISOL_HOST		BIT(1)
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| 
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| 
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| enum s5pv210_phy_id {
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| 	S5PV210_DEVICE,
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| 	S5PV210_HOST,
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| 	S5PV210_NUM_PHYS,
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| };
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| 
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| /*
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|  * s5pv210_rate_to_clk() converts the supplied clock rate to the value that
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|  * can be written to the phy register.
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|  */
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| static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg)
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| {
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| 	switch (rate) {
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| 	case 12 * MHZ:
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| 		*reg = S5PV210_UPHYCLK_PHYFSEL_12MHZ;
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| 		break;
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| 	case 24 * MHZ:
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| 		*reg = S5PV210_UPHYCLK_PHYFSEL_24MHZ;
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| 		break;
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| 	case 48 * MHZ:
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| 		*reg = S5PV210_UPHYCLK_PHYFSEL_48MHZ;
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| 		break;
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| 	default:
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static void s5pv210_isol(struct samsung_usb2_phy_instance *inst, bool on)
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| {
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| 	struct samsung_usb2_phy_driver *drv = inst->drv;
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| 	u32 mask;
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| 
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| 	switch (inst->cfg->id) {
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| 	case S5PV210_DEVICE:
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| 		mask = S5PV210_USB_ISOL_DEVICE;
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| 		break;
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| 	case S5PV210_HOST:
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| 		mask = S5PV210_USB_ISOL_HOST;
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| 		break;
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| 	default:
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| 		return;
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| 	}
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| 
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| 	regmap_update_bits(drv->reg_pmu, S5PV210_USB_ISOL_OFFSET,
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| 							mask, on ? 0 : mask);
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| }
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| 
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| static void s5pv210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on)
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| {
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| 	struct samsung_usb2_phy_driver *drv = inst->drv;
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| 	u32 rstbits = 0;
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| 	u32 phypwr = 0;
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| 	u32 rst;
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| 	u32 pwr;
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| 
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| 	switch (inst->cfg->id) {
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| 	case S5PV210_DEVICE:
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| 		phypwr =	S5PV210_UPHYPWR_PHY0;
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| 		rstbits =	S5PV210_URSTCON_PHY0;
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| 		break;
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| 	case S5PV210_HOST:
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| 		phypwr =	S5PV210_UPHYPWR_PHY1;
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| 		rstbits =	S5PV210_URSTCON_PHY1_ALL |
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| 				S5PV210_URSTCON_HOST_LINK_ALL;
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| 		break;
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| 	}
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| 
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| 	if (on) {
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| 		writel(drv->ref_reg_val, drv->reg_phy + S5PV210_UPHYCLK);
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| 
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| 		pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
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| 		pwr &= ~phypwr;
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| 		writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
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| 
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| 		rst = readl(drv->reg_phy + S5PV210_UPHYRST);
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| 		rst |= rstbits;
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| 		writel(rst, drv->reg_phy + S5PV210_UPHYRST);
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| 		udelay(10);
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| 		rst &= ~rstbits;
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| 		writel(rst, drv->reg_phy + S5PV210_UPHYRST);
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| 		/* The following delay is necessary for the reset sequence to be
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| 		 * completed
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| 		 */
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| 		udelay(80);
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| 	} else {
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| 		pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
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| 		pwr |= phypwr;
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| 		writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
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| 	}
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| }
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| 
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| static int s5pv210_power_on(struct samsung_usb2_phy_instance *inst)
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| {
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| 	s5pv210_isol(inst, 0);
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| 	s5pv210_phy_pwr(inst, 1);
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| 
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| 	return 0;
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| }
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| 
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| static int s5pv210_power_off(struct samsung_usb2_phy_instance *inst)
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| {
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| 	s5pv210_phy_pwr(inst, 0);
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| 	s5pv210_isol(inst, 1);
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| 
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| 	return 0;
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| }
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| 
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| static const struct samsung_usb2_common_phy s5pv210_phys[S5PV210_NUM_PHYS] = {
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| 	[S5PV210_DEVICE] = {
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| 		.label		= "device",
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| 		.id		= S5PV210_DEVICE,
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| 		.power_on	= s5pv210_power_on,
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| 		.power_off	= s5pv210_power_off,
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| 	},
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| 	[S5PV210_HOST] = {
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| 		.label		= "host",
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| 		.id		= S5PV210_HOST,
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| 		.power_on	= s5pv210_power_on,
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| 		.power_off	= s5pv210_power_off,
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| 	},
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| };
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| 
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| const struct samsung_usb2_phy_config s5pv210_usb2_phy_config = {
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| 	.num_phys	= ARRAY_SIZE(s5pv210_phys),
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| 	.phys		= s5pv210_phys,
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| 	.rate_to_clk	= s5pv210_rate_to_clk,
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| };
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