152 lines
3.4 KiB
C
152 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2009-2016 Cavium, Inc.
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*/
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#include <linux/acpi.h>
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#include <linux/gfp.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_mdio.h>
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include "mdio-cavium.h"
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struct thunder_mdiobus_nexus {
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void __iomem *bar0;
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struct cavium_mdiobus *buses[4];
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};
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static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct device_node *node;
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struct fwnode_handle *fwn;
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struct thunder_mdiobus_nexus *nexus;
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int err;
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int i;
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nexus = devm_kzalloc(&pdev->dev, sizeof(*nexus), GFP_KERNEL);
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if (!nexus)
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return -ENOMEM;
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pci_set_drvdata(pdev, nexus);
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err = pcim_enable_device(pdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to enable PCI device\n");
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pci_set_drvdata(pdev, NULL);
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return err;
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}
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err = pci_request_regions(pdev, KBUILD_MODNAME);
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if (err) {
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dev_err(&pdev->dev, "pci_request_regions failed\n");
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goto err_disable_device;
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}
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nexus->bar0 = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
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if (!nexus->bar0) {
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err = -ENOMEM;
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goto err_release_regions;
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}
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i = 0;
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device_for_each_child_node(&pdev->dev, fwn) {
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struct resource r;
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struct mii_bus *mii_bus;
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struct cavium_mdiobus *bus;
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union cvmx_smix_en smi_en;
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/* If it is not an OF node we cannot handle it yet, so
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* exit the loop.
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*/
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node = to_of_node(fwn);
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if (!node)
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break;
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err = of_address_to_resource(node, 0, &r);
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if (err) {
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dev_err(&pdev->dev,
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"Couldn't translate address for \"%pOFn\"\n",
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node);
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break;
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}
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mii_bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*bus));
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if (!mii_bus)
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break;
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bus = mii_bus->priv;
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bus->mii_bus = mii_bus;
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nexus->buses[i] = bus;
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i++;
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bus->register_base = nexus->bar0 +
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r.start - pci_resource_start(pdev, 0);
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smi_en.u64 = 0;
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smi_en.s.en = 1;
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oct_mdio_writeq(smi_en.u64, bus->register_base + SMI_EN);
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bus->mii_bus->name = KBUILD_MODNAME;
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snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%llx", r.start);
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bus->mii_bus->parent = &pdev->dev;
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bus->mii_bus->read = cavium_mdiobus_read;
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bus->mii_bus->write = cavium_mdiobus_write;
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err = of_mdiobus_register(bus->mii_bus, node);
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if (err)
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dev_err(&pdev->dev, "of_mdiobus_register failed\n");
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dev_info(&pdev->dev, "Added bus at %llx\n", r.start);
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if (i >= ARRAY_SIZE(nexus->buses))
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break;
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}
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return 0;
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err_release_regions:
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pci_release_regions(pdev);
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err_disable_device:
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pci_set_drvdata(pdev, NULL);
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return err;
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}
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static void thunder_mdiobus_pci_remove(struct pci_dev *pdev)
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{
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int i;
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struct thunder_mdiobus_nexus *nexus = pci_get_drvdata(pdev);
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for (i = 0; i < ARRAY_SIZE(nexus->buses); i++) {
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struct cavium_mdiobus *bus = nexus->buses[i];
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if (!bus)
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continue;
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mdiobus_unregister(bus->mii_bus);
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oct_mdio_writeq(0, bus->register_base + SMI_EN);
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}
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pci_release_regions(pdev);
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pci_set_drvdata(pdev, NULL);
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}
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static const struct pci_device_id thunder_mdiobus_id_table[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa02b) },
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{ 0, } /* End of table. */
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};
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MODULE_DEVICE_TABLE(pci, thunder_mdiobus_id_table);
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static struct pci_driver thunder_mdiobus_driver = {
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.name = KBUILD_MODNAME,
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.id_table = thunder_mdiobus_id_table,
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.probe = thunder_mdiobus_pci_probe,
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.remove = thunder_mdiobus_pci_remove,
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};
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module_pci_driver(thunder_mdiobus_driver);
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MODULE_DESCRIPTION("Cavium ThunderX MDIO bus driver");
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MODULE_LICENSE("GPL v2");
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