189 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			189 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  *  lpc_sch.c - LPC interface for Intel Poulsbo SCH
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|  *
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|  *  LPC bridge function of the Intel SCH contains many other
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|  *  functional units, such as Interrupt controllers, Timers,
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|  *  Power Management, System Management, GPIO, RTC, and LPC
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|  *  Configuration Registers.
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|  *
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|  *  Copyright (c) 2010 CompuLab Ltd
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|  *  Copyright (c) 2014 Intel Corp.
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|  *  Author: Denis Turischev <denis@compulab.co.il>
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/errno.h>
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| #include <linux/acpi.h>
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| #include <linux/pci.h>
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| #include <linux/mfd/core.h>
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| 
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| #define SMBASE		0x40
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| #define SMBUS_IO_SIZE	64
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| 
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| #define GPIOBASE	0x44
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| #define GPIO_IO_SIZE	64
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| #define GPIO_IO_SIZE_CENTERTON	128
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| 
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| #define WDTBASE		0x84
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| #define WDT_IO_SIZE	64
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| 
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| enum sch_chipsets {
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| 	LPC_SCH = 0,		/* Intel Poulsbo SCH */
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| 	LPC_ITC,		/* Intel Tunnel Creek */
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| 	LPC_CENTERTON,		/* Intel Centerton */
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| 	LPC_QUARK_X1000,	/* Intel Quark X1000 */
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| };
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| 
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| struct lpc_sch_info {
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| 	unsigned int io_size_smbus;
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| 	unsigned int io_size_gpio;
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| 	unsigned int io_size_wdt;
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| };
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| 
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| static struct lpc_sch_info sch_chipset_info[] = {
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| 	[LPC_SCH] = {
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| 		.io_size_smbus = SMBUS_IO_SIZE,
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| 		.io_size_gpio = GPIO_IO_SIZE,
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| 	},
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| 	[LPC_ITC] = {
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| 		.io_size_smbus = SMBUS_IO_SIZE,
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| 		.io_size_gpio = GPIO_IO_SIZE,
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| 		.io_size_wdt = WDT_IO_SIZE,
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| 	},
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| 	[LPC_CENTERTON] = {
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| 		.io_size_smbus = SMBUS_IO_SIZE,
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| 		.io_size_gpio = GPIO_IO_SIZE_CENTERTON,
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| 		.io_size_wdt = WDT_IO_SIZE,
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| 	},
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| 	[LPC_QUARK_X1000] = {
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| 		.io_size_gpio = GPIO_IO_SIZE,
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| 		.io_size_wdt = WDT_IO_SIZE,
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| 	},
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| };
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| 
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| static const struct pci_device_id lpc_sch_ids[] = {
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| 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH },
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| 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC },
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| 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON },
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| 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 },
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| 	{ 0, }
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| };
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| MODULE_DEVICE_TABLE(pci, lpc_sch_ids);
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| 
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| #define LPC_NO_RESOURCE		1
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| #define LPC_SKIP_RESOURCE	2
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| 
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| static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name,
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| 			  struct resource *res, int size)
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| {
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| 	unsigned int base_addr_cfg;
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| 	unsigned short base_addr;
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| 
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| 	if (size == 0)
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| 		return LPC_NO_RESOURCE;
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| 
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| 	pci_read_config_dword(pdev, where, &base_addr_cfg);
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| 	base_addr = 0;
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| 	if (!(base_addr_cfg & (1 << 31)))
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| 		dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n",
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| 			 name);
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| 	else
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| 		base_addr = (unsigned short)base_addr_cfg;
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| 
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| 	if (base_addr == 0) {
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| 		dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name);
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| 		return LPC_SKIP_RESOURCE;
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| 	}
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| 
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| 	res->start = base_addr;
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| 	res->end = base_addr + size - 1;
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| 	res->flags = IORESOURCE_IO;
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| 
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| 	return 0;
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| }
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| 
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| static int lpc_sch_populate_cell(struct pci_dev *pdev, int where,
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| 				 const char *name, int size, int id,
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| 				 struct mfd_cell *cell)
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| {
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| 	struct resource *res;
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| 	int ret;
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| 
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| 	res = devm_kzalloc(&pdev->dev, sizeof(*res), GFP_KERNEL);
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| 	if (!res)
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| 		return -ENOMEM;
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| 
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| 	ret = lpc_sch_get_io(pdev, where, name, res, size);
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| 	if (ret)
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| 		return ret;
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| 
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| 	memset(cell, 0, sizeof(*cell));
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| 
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| 	cell->name = name;
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| 	cell->resources = res;
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| 	cell->num_resources = 1;
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| 	cell->ignore_resource_conflicts = true;
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| 	cell->id = id;
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| 
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| 	return 0;
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| }
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| 
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| static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id)
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| {
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| 	struct mfd_cell lpc_sch_cells[3];
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| 	struct lpc_sch_info *info = &sch_chipset_info[id->driver_data];
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| 	unsigned int cells = 0;
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| 	int ret;
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| 
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| 	ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus",
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| 				    info->io_size_smbus,
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| 				    id->device, &lpc_sch_cells[cells]);
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| 	if (ret < 0)
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| 		return ret;
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| 	if (ret == 0)
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| 		cells++;
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| 
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| 	ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio",
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| 				    info->io_size_gpio,
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| 				    id->device, &lpc_sch_cells[cells]);
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| 	if (ret < 0)
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| 		return ret;
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| 	if (ret == 0)
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| 		cells++;
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| 
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| 	ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt",
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| 				    info->io_size_wdt,
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| 				    id->device, &lpc_sch_cells[cells]);
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| 	if (ret < 0)
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| 		return ret;
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| 	if (ret == 0)
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| 		cells++;
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| 
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| 	if (cells == 0) {
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| 		dev_err(&dev->dev, "All decode registers disabled.\n");
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| 		return -ENODEV;
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| 	}
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| 
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| 	return mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL);
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| }
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| 
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| static void lpc_sch_remove(struct pci_dev *dev)
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| {
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| 	mfd_remove_devices(&dev->dev);
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| }
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| 
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| static struct pci_driver lpc_sch_driver = {
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| 	.name		= "lpc_sch",
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| 	.id_table	= lpc_sch_ids,
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| 	.probe		= lpc_sch_probe,
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| 	.remove		= lpc_sch_remove,
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| };
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| 
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| module_pci_driver(lpc_sch_driver);
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| 
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| MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
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| MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH");
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| MODULE_LICENSE("GPL");
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