565 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			565 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
 | |
| /*
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|  * Device driver for the via ADB on (many) Mac II-class machines
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|  *
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|  * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
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|  * Also derived from code Copyright (C) 1996 Paul Mackerras.
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|  *
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|  * With various updates provided over the years by Michael Schmitz,
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|  * Guideo Koerber and others.
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|  *
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|  * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
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|  *
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|  * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
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|  * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
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|  *            - Big overhaul, should actually work now.
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|  * 2006-12-31 Finn Thain - Another overhaul.
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|  *
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|  * Suggested reading:
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|  *   Inside Macintosh, ch. 5 ADB Manager
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|  *   Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
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|  *   Rockwell R6522 VIA datasheet
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|  *
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|  * Apple's "ADB Analyzer" bus sniffer is invaluable:
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|  *   ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
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|  */
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| #include <linux/types.h>
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| #include <linux/errno.h>
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| #include <linux/kernel.h>
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| #include <linux/delay.h>
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| #include <linux/adb.h>
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| #include <linux/interrupt.h>
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| #include <linux/init.h>
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| #include <asm/macintosh.h>
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| #include <asm/macints.h>
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| #include <asm/mac_via.h>
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| 
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| static volatile unsigned char *via;
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| 
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| /* VIA registers - spaced 0x200 bytes apart */
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| #define RS		0x200		/* skip between registers */
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| #define B		0		/* B-side data */
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| #define A		RS		/* A-side data */
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| #define DIRB		(2*RS)		/* B-side direction (1=output) */
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| #define DIRA		(3*RS)		/* A-side direction (1=output) */
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| #define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */
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| #define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */
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| #define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */
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| #define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */
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| #define T2CL		(8*RS)		/* Timer 2 ctr/latch (low 8 bits) */
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| #define T2CH		(9*RS)		/* Timer 2 counter (high 8 bits) */
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| #define SR		(10*RS)		/* Shift register */
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| #define ACR		(11*RS)		/* Auxiliary control register */
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| #define PCR		(12*RS)		/* Peripheral control register */
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| #define IFR		(13*RS)		/* Interrupt flag register */
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| #define IER		(14*RS)		/* Interrupt enable register */
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| #define ANH		(15*RS)		/* A-side data, no handshake */
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| 
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| /* Bits in B data register: all active low */
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| #define CTLR_IRQ	0x08		/* Controller rcv status (input) */
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| #define ST_MASK		0x30		/* mask for selecting ADB state bits */
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| 
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| /* Bits in ACR */
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| #define SR_CTRL		0x1c		/* Shift register control bits */
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| #define SR_EXT		0x0c		/* Shift on external clock */
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| #define SR_OUT		0x10		/* Shift out if 1 */
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| 
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| /* Bits in IFR and IER */
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| #define IER_SET		0x80		/* set bits in IER */
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| #define IER_CLR		0		/* clear bits in IER */
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| #define SR_INT		0x04		/* Shift register full/empty */
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| 
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| /* ADB transaction states according to GMHW */
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| #define ST_CMD		0x00		/* ADB state: command byte */
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| #define ST_EVEN		0x10		/* ADB state: even data byte */
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| #define ST_ODD		0x20		/* ADB state: odd data byte */
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| #define ST_IDLE		0x30		/* ADB state: idle, nothing to send */
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| 
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| /* ADB command byte structure */
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| #define ADDR_MASK	0xF0
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| #define CMD_MASK	0x0F
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| #define OP_MASK		0x0C
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| #define TALK		0x0C
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| 
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| static int macii_init_via(void);
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| static void macii_start(void);
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| static irqreturn_t macii_interrupt(int irq, void *arg);
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| static void macii_queue_poll(void);
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| 
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| static int macii_probe(void);
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| static int macii_init(void);
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| static int macii_send_request(struct adb_request *req, int sync);
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| static int macii_write(struct adb_request *req);
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| static int macii_autopoll(int devs);
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| static void macii_poll(void);
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| static int macii_reset_bus(void);
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| 
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| struct adb_driver via_macii_driver = {
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| 	.name         = "Mac II",
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| 	.probe        = macii_probe,
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| 	.init         = macii_init,
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| 	.send_request = macii_send_request,
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| 	.autopoll     = macii_autopoll,
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| 	.poll         = macii_poll,
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| 	.reset_bus    = macii_reset_bus,
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| };
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| 
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| static enum macii_state {
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| 	idle,
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| 	sending,
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| 	reading,
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| } macii_state;
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| 
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| static struct adb_request *current_req; /* first request struct in the queue */
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| static struct adb_request *last_req;     /* last request struct in the queue */
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| static unsigned char reply_buf[16];        /* storage for autopolled replies */
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| static unsigned char *reply_ptr;     /* next byte in reply_buf or req->reply */
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| static bool reading_reply;       /* store reply in reply_buf else req->reply */
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| static int data_index;      /* index of the next byte to send from req->data */
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| static int reply_len; /* number of bytes received in reply_buf or req->reply */
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| static int status;          /* VIA's ADB status bits captured upon interrupt */
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| static bool bus_timeout;                   /* no data was sent by the device */
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| static bool srq_asserted;    /* have to poll for the device that asserted it */
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| static u8 last_cmd;              /* the most recent command byte transmitted */
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| static u8 last_talk_cmd;    /* the most recent Talk command byte transmitted */
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| static u8 last_poll_cmd; /* the most recent Talk R0 command byte transmitted */
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| static unsigned int autopoll_devs;  /* bits set are device addresses to poll */
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| 
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| /* Check for MacII style ADB */
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| static int macii_probe(void)
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| {
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| 	if (macintosh_config->adb_type != MAC_ADB_II)
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| 		return -ENODEV;
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| 
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| 	via = via1;
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| 
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| 	pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
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| 	return 0;
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| }
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| 
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| /* Initialize the driver */
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| static int macii_init(void)
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| {
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| 	unsigned long flags;
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| 	int err;
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| 
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| 	local_irq_save(flags);
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| 
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| 	err = macii_init_via();
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| 	if (err)
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| 		goto out;
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| 
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| 	err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB",
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| 			  macii_interrupt);
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| 	if (err)
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| 		goto out;
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| 
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| 	macii_state = idle;
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| out:
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| 	local_irq_restore(flags);
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| 	return err;
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| }
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| 
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| /* initialize the hardware */
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| static int macii_init_via(void)
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| {
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| 	unsigned char x;
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| 
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| 	/* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
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| 	via[DIRB] = (via[DIRB] | ST_EVEN | ST_ODD) & ~CTLR_IRQ;
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| 
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| 	/* Set up state: idle */
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| 	via[B] |= ST_IDLE;
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| 
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| 	/* Shift register on input */
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| 	via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
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| 
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| 	/* Wipe any pending data and int */
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| 	x = via[SR];
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| 
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| 	return 0;
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| }
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| 
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| /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
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| static void macii_queue_poll(void)
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| {
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| 	static struct adb_request req;
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| 	unsigned char poll_command;
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| 	unsigned int poll_addr;
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| 
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| 	/* This only polls devices in the autopoll list, which assumes that
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| 	 * unprobed devices never assert SRQ. That could happen if a device was
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| 	 * plugged in after the adb bus scan. Unplugging it again will resolve
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| 	 * the problem. This behaviour is similar to MacOS.
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| 	 */
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| 	if (!autopoll_devs)
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| 		return;
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| 
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| 	/* The device most recently polled may not be the best device to poll
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| 	 * right now. Some other device(s) may have signalled SRQ (the active
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| 	 * device won't do that). Or the autopoll list may have been changed.
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| 	 * Try polling the next higher address.
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| 	 */
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| 	poll_addr = (last_poll_cmd & ADDR_MASK) >> 4;
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| 	if ((srq_asserted && last_cmd == last_poll_cmd) ||
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| 	    !(autopoll_devs & (1 << poll_addr))) {
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| 		unsigned int higher_devs;
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| 
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| 		higher_devs = autopoll_devs & -(1 << (poll_addr + 1));
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| 		poll_addr = ffs(higher_devs ? higher_devs : autopoll_devs) - 1;
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| 	}
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| 
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| 	/* Send a Talk Register 0 command */
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| 	poll_command = ADB_READREG(poll_addr, 0);
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| 
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| 	/* No need to repeat this Talk command. The transceiver will do that
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| 	 * as long as it is idle.
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| 	 */
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| 	if (poll_command == last_cmd)
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| 		return;
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| 
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| 	adb_request(&req, NULL, ADBREQ_NOSEND, 1, poll_command);
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| 
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| 	req.sent = 0;
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| 	req.complete = 0;
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| 	req.reply_len = 0;
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| 	req.next = current_req;
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| 
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| 	if (WARN_ON(current_req)) {
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| 		current_req = &req;
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| 	} else {
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| 		current_req = &req;
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| 		last_req = &req;
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| 	}
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| }
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| 
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| /* Send an ADB request; if sync, poll out the reply 'till it's done */
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| static int macii_send_request(struct adb_request *req, int sync)
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| {
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| 	int err;
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| 
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| 	err = macii_write(req);
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| 	if (err)
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| 		return err;
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| 
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| 	if (sync)
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| 		while (!req->complete)
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| 			macii_poll();
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| 
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| 	return 0;
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| }
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| 
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| /* Send an ADB request (append to request queue) */
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| static int macii_write(struct adb_request *req)
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| {
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| 	unsigned long flags;
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| 
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| 	if (req->nbytes < 2 || req->data[0] != ADB_PACKET || req->nbytes > 15) {
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| 		req->complete = 1;
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| 		return -EINVAL;
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| 	}
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| 
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| 	req->next = NULL;
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| 	req->sent = 0;
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| 	req->complete = 0;
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| 	req->reply_len = 0;
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| 
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| 	local_irq_save(flags);
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| 
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| 	if (current_req != NULL) {
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| 		last_req->next = req;
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| 		last_req = req;
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| 	} else {
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| 		current_req = req;
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| 		last_req = req;
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| 		if (macii_state == idle)
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| 			macii_start();
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| 	}
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| 
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| 	local_irq_restore(flags);
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| 
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| 	return 0;
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| }
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| 
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| /* Start auto-polling */
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| static int macii_autopoll(int devs)
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| {
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| 	unsigned long flags;
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| 
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| 	local_irq_save(flags);
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| 
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| 	/* bit 1 == device 1, and so on. */
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| 	autopoll_devs = (unsigned int)devs & 0xFFFE;
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| 
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| 	if (!current_req) {
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| 		macii_queue_poll();
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| 		if (current_req && macii_state == idle)
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| 			macii_start();
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| 	}
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| 
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| 	local_irq_restore(flags);
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| 
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| 	return 0;
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| }
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| 
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| /* Prod the chip without interrupts */
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| static void macii_poll(void)
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| {
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| 	macii_interrupt(0, NULL);
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| }
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| 
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| /* Reset the bus */
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| static int macii_reset_bus(void)
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| {
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| 	struct adb_request req;
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| 
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| 	/* Command = 0, Address = ignored */
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| 	adb_request(&req, NULL, ADBREQ_NOSEND, 1, ADB_BUSRESET);
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| 	macii_send_request(&req, 1);
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| 
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| 	/* Don't want any more requests during the Global Reset low time. */
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| 	udelay(3000);
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| 
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| 	return 0;
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| }
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| 
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| /* Start sending ADB packet */
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| static void macii_start(void)
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| {
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| 	struct adb_request *req;
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| 
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| 	req = current_req;
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| 
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| 	/* Now send it. Be careful though, that first byte of the request
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| 	 * is actually ADB_PACKET; the real data begins at index 1!
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| 	 * And req->nbytes is the number of bytes of real data plus one.
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| 	 */
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| 
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| 	/* Output mode */
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| 	via[ACR] |= SR_OUT;
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| 	/* Load data */
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| 	via[SR] = req->data[1];
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| 	/* set ADB state to 'command' */
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| 	via[B] = (via[B] & ~ST_MASK) | ST_CMD;
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| 
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| 	macii_state = sending;
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| 	data_index = 2;
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| 
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| 	bus_timeout = false;
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| 	srq_asserted = false;
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| }
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| 
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| /*
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|  * The notorious ADB interrupt handler - does all of the protocol handling.
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|  * Relies on the ADB controller sending and receiving data, thereby
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|  * generating shift register interrupts (SR_INT) for us. This means there has
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|  * to be activity on the ADB bus. The chip will poll to achieve this.
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|  *
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|  * The VIA Port B output signalling works as follows. After the ADB transceiver
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|  * sees a transition on the PB4 and PB5 lines it will crank over the VIA shift
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|  * register which eventually raises the SR_INT interrupt. The PB4/PB5 outputs
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|  * are toggled with each byte as the ADB transaction progresses.
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|  *
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|  * Request with no reply expected (and empty transceiver buffer):
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|  *     CMD -> IDLE
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|  * Request with expected reply packet (or with buffered autopoll packet):
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|  *     CMD -> EVEN -> ODD -> EVEN -> ... -> IDLE
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|  * Unsolicited packet:
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|  *     IDLE -> EVEN -> ODD -> EVEN -> ... -> IDLE
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|  */
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| static irqreturn_t macii_interrupt(int irq, void *arg)
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| {
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| 	int x;
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| 	struct adb_request *req;
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| 	unsigned long flags;
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| 
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| 	local_irq_save(flags);
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| 
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| 	if (!arg) {
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| 		/* Clear the SR IRQ flag when polling. */
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| 		if (via[IFR] & SR_INT)
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| 			via[IFR] = SR_INT;
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| 		else {
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| 			local_irq_restore(flags);
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| 			return IRQ_NONE;
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| 		}
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| 	}
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| 
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| 	status = via[B] & (ST_MASK | CTLR_IRQ);
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| 
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| 	switch (macii_state) {
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| 	case idle:
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| 		WARN_ON((status & ST_MASK) != ST_IDLE);
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| 
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| 		reply_ptr = reply_buf;
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| 		reading_reply = false;
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| 
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| 		bus_timeout = false;
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| 		srq_asserted = false;
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| 
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| 		x = via[SR];
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| 
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| 		if (!(status & CTLR_IRQ)) {
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| 			/* /CTLR_IRQ asserted in idle state means we must
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| 			 * read an autopoll reply from the transceiver buffer.
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| 			 */
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| 			macii_state = reading;
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| 			*reply_ptr = x;
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| 			reply_len = 1;
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| 		} else {
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| 			/* bus timeout */
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| 			reply_len = 0;
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| 			break;
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| 		}
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| 
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| 		/* set ADB state = even for first data byte */
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| 		via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
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| 		break;
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| 
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| 	case sending:
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| 		req = current_req;
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| 
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| 		if (status == (ST_CMD | CTLR_IRQ)) {
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| 			/* /CTLR_IRQ de-asserted after the command byte means
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| 			 * the host can continue with the transaction.
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| 			 */
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| 
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| 			/* Store command byte */
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| 			last_cmd = req->data[1];
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| 			if ((last_cmd & OP_MASK) == TALK) {
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| 				last_talk_cmd = last_cmd;
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| 				if ((last_cmd & CMD_MASK) == ADB_READREG(0, 0))
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| 					last_poll_cmd = last_cmd;
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| 			}
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| 		}
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| 
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| 		if (status == ST_CMD) {
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| 			/* /CTLR_IRQ asserted after the command byte means we
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| 			 * must read an autopoll reply. The first byte was
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| 			 * lost because the shift register was an output.
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| 			 */
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| 			macii_state = reading;
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| 
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| 			reading_reply = false;
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| 			reply_ptr = reply_buf;
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| 			*reply_ptr = last_talk_cmd;
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| 			reply_len = 1;
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| 
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| 			/* reset to shift in */
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| 			via[ACR] &= ~SR_OUT;
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| 			x = via[SR];
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| 		} else if (data_index >= req->nbytes) {
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| 			req->sent = 1;
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| 
 | |
| 			if (req->reply_expected) {
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| 				macii_state = reading;
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| 
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| 				reading_reply = true;
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| 				reply_ptr = req->reply;
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| 				*reply_ptr = req->data[1];
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| 				reply_len = 1;
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| 
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| 				via[ACR] &= ~SR_OUT;
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| 				x = via[SR];
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| 			} else if ((req->data[1] & OP_MASK) == TALK) {
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| 				macii_state = reading;
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| 
 | |
| 				reading_reply = false;
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| 				reply_ptr = reply_buf;
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| 				*reply_ptr = req->data[1];
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| 				reply_len = 1;
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| 
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| 				via[ACR] &= ~SR_OUT;
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| 				x = via[SR];
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| 
 | |
| 				req->complete = 1;
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| 				current_req = req->next;
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| 				if (req->done)
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| 					(*req->done)(req);
 | |
| 			} else {
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| 				macii_state = idle;
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| 
 | |
| 				req->complete = 1;
 | |
| 				current_req = req->next;
 | |
| 				if (req->done)
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| 					(*req->done)(req);
 | |
| 				break;
 | |
| 			}
 | |
| 		} else {
 | |
| 			via[SR] = req->data[data_index++];
 | |
| 		}
 | |
| 
 | |
| 		if ((via[B] & ST_MASK) == ST_CMD) {
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| 			/* just sent the command byte, set to EVEN */
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| 			via[B] = (via[B] & ~ST_MASK) | ST_EVEN;
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| 		} else {
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| 			/* invert state bits, toggle ODD/EVEN */
 | |
| 			via[B] ^= ST_MASK;
 | |
| 		}
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| 		break;
 | |
| 
 | |
| 	case reading:
 | |
| 		x = via[SR];
 | |
| 		WARN_ON((status & ST_MASK) == ST_CMD ||
 | |
| 			(status & ST_MASK) == ST_IDLE);
 | |
| 
 | |
| 		if (!(status & CTLR_IRQ)) {
 | |
| 			if (status == ST_EVEN && reply_len == 1) {
 | |
| 				bus_timeout = true;
 | |
| 			} else if (status == ST_ODD && reply_len == 2) {
 | |
| 				srq_asserted = true;
 | |
| 			} else {
 | |
| 				macii_state = idle;
 | |
| 
 | |
| 				if (bus_timeout)
 | |
| 					reply_len = 0;
 | |
| 
 | |
| 				if (reading_reply) {
 | |
| 					struct adb_request *req = current_req;
 | |
| 
 | |
| 					req->reply_len = reply_len;
 | |
| 
 | |
| 					req->complete = 1;
 | |
| 					current_req = req->next;
 | |
| 					if (req->done)
 | |
| 						(*req->done)(req);
 | |
| 				} else if (reply_len && autopoll_devs &&
 | |
| 					   reply_buf[0] == last_poll_cmd) {
 | |
| 					adb_input(reply_buf, reply_len, 1);
 | |
| 				}
 | |
| 				break;
 | |
| 			}
 | |
| 		}
 | |
| 
 | |
| 		if (reply_len < ARRAY_SIZE(reply_buf)) {
 | |
| 			reply_ptr++;
 | |
| 			*reply_ptr = x;
 | |
| 			reply_len++;
 | |
| 		}
 | |
| 
 | |
| 		/* invert state bits, toggle ODD/EVEN */
 | |
| 		via[B] ^= ST_MASK;
 | |
| 		break;
 | |
| 
 | |
| 	default:
 | |
| 		break;
 | |
| 	}
 | |
| 
 | |
| 	if (macii_state == idle) {
 | |
| 		if (!current_req)
 | |
| 			macii_queue_poll();
 | |
| 
 | |
| 		if (current_req)
 | |
| 			macii_start();
 | |
| 
 | |
| 		if (macii_state == idle) {
 | |
| 			via[ACR] &= ~SR_OUT;
 | |
| 			x = via[SR];
 | |
| 			via[B] = (via[B] & ~ST_MASK) | ST_IDLE;
 | |
| 		}
 | |
| 	}
 | |
| 
 | |
| 	local_irq_restore(flags);
 | |
| 	return IRQ_HANDLED;
 | |
| }
 |