566 lines
14 KiB
C
566 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Hardware monitoring driver for Maxim MAX6621
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*
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* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2017 Vadim Pasternak <vadimp@mellanox.com>
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*/
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#include <linux/bitops.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#define MAX6621_DRV_NAME "max6621"
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#define MAX6621_TEMP_INPUT_REG_NUM 9
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#define MAX6621_TEMP_INPUT_MIN -127000
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#define MAX6621_TEMP_INPUT_MAX 128000
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#define MAX6621_TEMP_ALERT_CHAN_SHIFT 1
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#define MAX6621_TEMP_S0D0_REG 0x00
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#define MAX6621_TEMP_S0D1_REG 0x01
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#define MAX6621_TEMP_S1D0_REG 0x02
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#define MAX6621_TEMP_S1D1_REG 0x03
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#define MAX6621_TEMP_S2D0_REG 0x04
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#define MAX6621_TEMP_S2D1_REG 0x05
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#define MAX6621_TEMP_S3D0_REG 0x06
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#define MAX6621_TEMP_S3D1_REG 0x07
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#define MAX6621_TEMP_MAX_REG 0x08
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#define MAX6621_TEMP_MAX_ADDR_REG 0x0a
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#define MAX6621_TEMP_ALERT_CAUSE_REG 0x0b
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#define MAX6621_CONFIG0_REG 0x0c
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#define MAX6621_CONFIG1_REG 0x0d
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#define MAX6621_CONFIG2_REG 0x0e
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#define MAX6621_CONFIG3_REG 0x0f
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#define MAX6621_TEMP_S0_ALERT_REG 0x10
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#define MAX6621_TEMP_S1_ALERT_REG 0x11
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#define MAX6621_TEMP_S2_ALERT_REG 0x12
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#define MAX6621_TEMP_S3_ALERT_REG 0x13
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#define MAX6621_CLEAR_ALERT_REG 0x15
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#define MAX6621_REG_MAX (MAX6621_CLEAR_ALERT_REG + 1)
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#define MAX6621_REG_TEMP_SHIFT 0x06
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#define MAX6621_ENABLE_TEMP_ALERTS_BIT 4
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#define MAX6621_ENABLE_I2C_CRC_BIT 5
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#define MAX6621_ENABLE_ALTERNATE_DATA 6
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#define MAX6621_ENABLE_LOCKUP_TO 7
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#define MAX6621_ENABLE_S0D0_BIT 8
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#define MAX6621_ENABLE_S3D1_BIT 15
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#define MAX6621_ENABLE_TEMP_ALL GENMASK(MAX6621_ENABLE_S3D1_BIT, \
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MAX6621_ENABLE_S0D0_BIT)
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#define MAX6621_POLL_DELAY_MASK 0x5
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#define MAX6621_CONFIG0_INIT (MAX6621_ENABLE_TEMP_ALL | \
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BIT(MAX6621_ENABLE_LOCKUP_TO) | \
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BIT(MAX6621_ENABLE_I2C_CRC_BIT) | \
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MAX6621_POLL_DELAY_MASK)
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#define MAX6621_PECI_BIT_TIME 0x2
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#define MAX6621_PECI_RETRY_NUM 0x3
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#define MAX6621_CONFIG1_INIT ((MAX6621_PECI_BIT_TIME << 8) | \
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MAX6621_PECI_RETRY_NUM)
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/* Error codes */
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#define MAX6621_TRAN_FAILED 0x8100 /*
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* PECI transaction failed for more
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* than the configured number of
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* consecutive retries.
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*/
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#define MAX6621_POOL_DIS 0x8101 /*
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* Polling disabled for requested
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* socket/domain.
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*/
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#define MAX6621_POOL_UNCOMPLETE 0x8102 /*
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* First poll not yet completed for
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* requested socket/domain (on
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* startup).
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*/
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#define MAX6621_SD_DIS 0x8103 /*
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* Read maximum temperature requested,
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* but no sockets/domains enabled or
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* all enabled sockets/domains have
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* errors; or read maximum temperature
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* address requested, but read maximum
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* temperature was not called.
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*/
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#define MAX6621_ALERT_DIS 0x8104 /*
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* Get alert socket/domain requested,
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* but no alert active.
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*/
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#define MAX6621_PECI_ERR_MIN 0x8000 /* Intel spec PECI error min value. */
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#define MAX6621_PECI_ERR_MAX 0x80ff /* Intel spec PECI error max value. */
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static const u32 max6621_temp_regs[] = {
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MAX6621_TEMP_MAX_REG, MAX6621_TEMP_S0D0_REG, MAX6621_TEMP_S1D0_REG,
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MAX6621_TEMP_S2D0_REG, MAX6621_TEMP_S3D0_REG, MAX6621_TEMP_S0D1_REG,
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MAX6621_TEMP_S1D1_REG, MAX6621_TEMP_S2D1_REG, MAX6621_TEMP_S3D1_REG,
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};
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static const char *const max6621_temp_labels[] = {
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"maximum",
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"socket0_0",
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"socket1_0",
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"socket2_0",
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"socket3_0",
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"socket0_1",
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"socket1_1",
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"socket2_1",
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"socket3_1",
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};
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static const int max6621_temp_alert_chan2reg[] = {
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MAX6621_TEMP_S0_ALERT_REG,
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MAX6621_TEMP_S1_ALERT_REG,
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MAX6621_TEMP_S2_ALERT_REG,
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MAX6621_TEMP_S3_ALERT_REG,
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};
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/**
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* struct max6621_data - private data:
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*
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* @client: I2C client;
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* @regmap: register map handle;
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* @input_chan2reg: mapping from channel to register;
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*/
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struct max6621_data {
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struct i2c_client *client;
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struct regmap *regmap;
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int input_chan2reg[MAX6621_TEMP_INPUT_REG_NUM + 1];
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};
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static long max6621_temp_mc2reg(long val)
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{
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return (val / 1000L) << MAX6621_REG_TEMP_SHIFT;
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}
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static umode_t
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max6621_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
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int channel)
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{
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/* Skip channels which are not physically conncted. */
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if (((struct max6621_data *)data)->input_chan2reg[channel] < 0)
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return 0;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_label:
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case hwmon_temp_crit_alarm:
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return 0444;
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case hwmon_temp_offset:
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case hwmon_temp_crit:
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return 0644;
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default:
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break;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static int max6621_verify_reg_data(struct device *dev, int regval)
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{
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if (regval >= MAX6621_PECI_ERR_MIN &&
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regval <= MAX6621_PECI_ERR_MAX) {
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dev_dbg(dev, "PECI error code - err 0x%04x.\n",
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regval);
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return -EIO;
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}
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switch (regval) {
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case MAX6621_TRAN_FAILED:
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dev_dbg(dev, "PECI transaction failed - err 0x%04x.\n",
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regval);
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return -EIO;
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case MAX6621_POOL_DIS:
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dev_dbg(dev, "Polling disabled - err 0x%04x.\n", regval);
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return -EOPNOTSUPP;
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case MAX6621_POOL_UNCOMPLETE:
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dev_dbg(dev, "First poll not completed on startup - err 0x%04x.\n",
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regval);
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return -EIO;
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case MAX6621_SD_DIS:
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dev_dbg(dev, "Resource is disabled - err 0x%04x.\n", regval);
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return -EOPNOTSUPP;
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case MAX6621_ALERT_DIS:
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dev_dbg(dev, "No alert active - err 0x%04x.\n", regval);
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return -EOPNOTSUPP;
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default:
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return 0;
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}
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}
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static int
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max6621_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
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int channel, long *val)
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{
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struct max6621_data *data = dev_get_drvdata(dev);
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u32 regval;
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int reg;
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s8 temp;
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int ret;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_input:
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reg = data->input_chan2reg[channel];
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ret = regmap_read(data->regmap, reg, ®val);
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if (ret)
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return ret;
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ret = max6621_verify_reg_data(dev, regval);
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if (ret)
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return ret;
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/*
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* Bit MAX6621_REG_TEMP_SHIFT represents 1 degree step.
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* The temperature is given in two's complement and 8
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* bits is used for the register conversion.
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*/
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temp = (regval >> MAX6621_REG_TEMP_SHIFT);
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*val = temp * 1000L;
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break;
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case hwmon_temp_offset:
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ret = regmap_read(data->regmap, MAX6621_CONFIG2_REG,
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®val);
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if (ret)
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return ret;
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ret = max6621_verify_reg_data(dev, regval);
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if (ret)
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return ret;
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*val = (regval >> MAX6621_REG_TEMP_SHIFT) *
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1000L;
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break;
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case hwmon_temp_crit:
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channel -= MAX6621_TEMP_ALERT_CHAN_SHIFT;
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reg = max6621_temp_alert_chan2reg[channel];
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ret = regmap_read(data->regmap, reg, ®val);
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if (ret)
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return ret;
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ret = max6621_verify_reg_data(dev, regval);
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if (ret)
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return ret;
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*val = regval * 1000L;
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break;
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case hwmon_temp_crit_alarm:
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/*
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* Set val to zero to recover the case, when reading
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* MAX6621_TEMP_ALERT_CAUSE_REG results in for example
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* MAX6621_ALERT_DIS. Reading will return with error,
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* but in such case alarm should be returned as 0.
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*/
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*val = 0;
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ret = regmap_read(data->regmap,
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MAX6621_TEMP_ALERT_CAUSE_REG,
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®val);
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if (ret)
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return ret;
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ret = max6621_verify_reg_data(dev, regval);
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if (ret) {
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/* Do not report error if alert is disabled. */
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if (regval == MAX6621_ALERT_DIS)
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return 0;
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else
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return ret;
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}
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/*
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* Clear the alert automatically, using send-byte
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* smbus protocol for clearing alert.
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*/
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if (regval) {
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ret = i2c_smbus_write_byte(data->client,
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MAX6621_CLEAR_ALERT_REG);
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if (ret)
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return ret;
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}
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*val = !!regval;
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break;
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default:
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return -EOPNOTSUPP;
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}
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int
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max6621_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
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int channel, long val)
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{
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struct max6621_data *data = dev_get_drvdata(dev);
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u32 reg;
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_offset:
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/* Clamp to allowed range to prevent overflow. */
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val = clamp_val(val, MAX6621_TEMP_INPUT_MIN,
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MAX6621_TEMP_INPUT_MAX);
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val = max6621_temp_mc2reg(val);
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return regmap_write(data->regmap,
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MAX6621_CONFIG2_REG, val);
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case hwmon_temp_crit:
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channel -= MAX6621_TEMP_ALERT_CHAN_SHIFT;
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reg = max6621_temp_alert_chan2reg[channel];
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/* Clamp to allowed range to prevent overflow. */
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val = clamp_val(val, MAX6621_TEMP_INPUT_MIN,
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MAX6621_TEMP_INPUT_MAX);
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val = val / 1000L;
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return regmap_write(data->regmap, reg, val);
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default:
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return -EOPNOTSUPP;
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}
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break;
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default:
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return -EOPNOTSUPP;
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}
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return -EOPNOTSUPP;
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}
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static int
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max6621_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr,
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int channel, const char **str)
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{
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switch (type) {
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case hwmon_temp:
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switch (attr) {
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case hwmon_temp_label:
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*str = max6621_temp_labels[channel];
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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break;
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default:
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return -EOPNOTSUPP;
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}
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return -EOPNOTSUPP;
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}
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static bool max6621_writeable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX6621_CONFIG0_REG:
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case MAX6621_CONFIG1_REG:
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case MAX6621_CONFIG2_REG:
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case MAX6621_CONFIG3_REG:
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case MAX6621_TEMP_S0_ALERT_REG:
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case MAX6621_TEMP_S1_ALERT_REG:
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case MAX6621_TEMP_S2_ALERT_REG:
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case MAX6621_TEMP_S3_ALERT_REG:
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case MAX6621_TEMP_ALERT_CAUSE_REG:
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return true;
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}
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return false;
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}
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static bool max6621_readable_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX6621_TEMP_S0D0_REG:
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case MAX6621_TEMP_S0D1_REG:
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case MAX6621_TEMP_S1D0_REG:
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case MAX6621_TEMP_S1D1_REG:
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case MAX6621_TEMP_S2D0_REG:
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case MAX6621_TEMP_S2D1_REG:
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case MAX6621_TEMP_S3D0_REG:
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case MAX6621_TEMP_S3D1_REG:
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case MAX6621_TEMP_MAX_REG:
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case MAX6621_TEMP_MAX_ADDR_REG:
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case MAX6621_CONFIG0_REG:
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case MAX6621_CONFIG1_REG:
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case MAX6621_CONFIG2_REG:
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case MAX6621_CONFIG3_REG:
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case MAX6621_TEMP_S0_ALERT_REG:
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case MAX6621_TEMP_S1_ALERT_REG:
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case MAX6621_TEMP_S2_ALERT_REG:
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case MAX6621_TEMP_S3_ALERT_REG:
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return true;
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}
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return false;
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}
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static bool max6621_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX6621_TEMP_S0D0_REG:
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case MAX6621_TEMP_S0D1_REG:
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case MAX6621_TEMP_S1D0_REG:
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case MAX6621_TEMP_S1D1_REG:
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case MAX6621_TEMP_S2D0_REG:
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case MAX6621_TEMP_S2D1_REG:
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case MAX6621_TEMP_S3D0_REG:
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case MAX6621_TEMP_S3D1_REG:
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case MAX6621_TEMP_MAX_REG:
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case MAX6621_TEMP_S0_ALERT_REG:
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case MAX6621_TEMP_S1_ALERT_REG:
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case MAX6621_TEMP_S2_ALERT_REG:
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case MAX6621_TEMP_S3_ALERT_REG:
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case MAX6621_TEMP_ALERT_CAUSE_REG:
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return true;
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}
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return false;
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}
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static const struct reg_default max6621_regmap_default[] = {
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{ MAX6621_CONFIG0_REG, MAX6621_CONFIG0_INIT },
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{ MAX6621_CONFIG1_REG, MAX6621_CONFIG1_INIT },
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};
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static const struct regmap_config max6621_regmap_config = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = MAX6621_REG_MAX,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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.cache_type = REGCACHE_FLAT,
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.writeable_reg = max6621_writeable_reg,
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.readable_reg = max6621_readable_reg,
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.volatile_reg = max6621_volatile_reg,
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.reg_defaults = max6621_regmap_default,
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.num_reg_defaults = ARRAY_SIZE(max6621_regmap_default),
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};
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static const struct hwmon_channel_info *max6621_info[] = {
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HWMON_CHANNEL_INFO(chip,
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HWMON_C_REGISTER_TZ),
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_OFFSET,
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HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_LABEL),
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NULL
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};
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static const struct hwmon_ops max6621_hwmon_ops = {
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.read = max6621_read,
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.write = max6621_write,
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.read_string = max6621_read_string,
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.is_visible = max6621_is_visible,
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};
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static const struct hwmon_chip_info max6621_chip_info = {
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.ops = &max6621_hwmon_ops,
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.info = max6621_info,
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};
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static int max6621_probe(struct i2c_client *client)
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{
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struct device *dev = &client->dev;
|
|
struct max6621_data *data;
|
|
struct device *hwmon_dev;
|
|
int i;
|
|
int ret;
|
|
|
|
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
data->regmap = devm_regmap_init_i2c(client, &max6621_regmap_config);
|
|
if (IS_ERR(data->regmap))
|
|
return PTR_ERR(data->regmap);
|
|
|
|
i2c_set_clientdata(client, data);
|
|
data->client = client;
|
|
|
|
/* Set CONFIG0 register masking temperature alerts and PEC. */
|
|
ret = regmap_write(data->regmap, MAX6621_CONFIG0_REG,
|
|
MAX6621_CONFIG0_INIT);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Set CONFIG1 register for PEC access retry number. */
|
|
ret = regmap_write(data->regmap, MAX6621_CONFIG1_REG,
|
|
MAX6621_CONFIG1_INIT);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Sync registers with hardware. */
|
|
regcache_mark_dirty(data->regmap);
|
|
ret = regcache_sync(data->regmap);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Verify which temperature input registers are enabled. */
|
|
for (i = 0; i < MAX6621_TEMP_INPUT_REG_NUM; i++) {
|
|
ret = i2c_smbus_read_word_data(client, max6621_temp_regs[i]);
|
|
if (ret < 0)
|
|
return ret;
|
|
ret = max6621_verify_reg_data(dev, ret);
|
|
if (ret) {
|
|
data->input_chan2reg[i] = -1;
|
|
continue;
|
|
}
|
|
|
|
data->input_chan2reg[i] = max6621_temp_regs[i];
|
|
}
|
|
|
|
hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
|
|
data,
|
|
&max6621_chip_info,
|
|
NULL);
|
|
|
|
return PTR_ERR_OR_ZERO(hwmon_dev);
|
|
}
|
|
|
|
static const struct i2c_device_id max6621_id[] = {
|
|
{ MAX6621_DRV_NAME, 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, max6621_id);
|
|
|
|
static const struct of_device_id __maybe_unused max6621_of_match[] = {
|
|
{ .compatible = "maxim,max6621" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, max6621_of_match);
|
|
|
|
static struct i2c_driver max6621_driver = {
|
|
.class = I2C_CLASS_HWMON,
|
|
.driver = {
|
|
.name = MAX6621_DRV_NAME,
|
|
.of_match_table = of_match_ptr(max6621_of_match),
|
|
},
|
|
.probe_new = max6621_probe,
|
|
.id_table = max6621_id,
|
|
};
|
|
|
|
module_i2c_driver(max6621_driver);
|
|
|
|
MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
|
|
MODULE_DESCRIPTION("Driver for Maxim MAX6621");
|
|
MODULE_LICENSE("GPL");
|