146 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			146 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| // Copyright (C) 2007-2008 Atmel Corporation
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| // Copyright (C) 2010-2011 ST Microelectronics
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| // Copyright (C) 2013,2018 Intel Corporation
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| 
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| #include <linux/bitops.h>
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| #include <linux/dmaengine.h>
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| #include <linux/errno.h>
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| #include <linux/slab.h>
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| #include <linux/types.h>
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| 
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| #include "internal.h"
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| 
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| static void dw_dma_initialize_chan(struct dw_dma_chan *dwc)
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| {
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| 	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
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| 	u32 cfghi = is_slave_direction(dwc->direction) ? 0 : DWC_CFGH_FIFO_MODE;
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| 	u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
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| 	bool hs_polarity = dwc->dws.hs_polarity;
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| 
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| 	cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
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| 	cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
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| 	cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl);
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| 
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| 	/* Set polarity of handshake interface */
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| 	cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
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| 
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| 	channel_writel(dwc, CFG_LO, cfglo);
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| 	channel_writel(dwc, CFG_HI, cfghi);
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| }
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| 
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| static void dw_dma_suspend_chan(struct dw_dma_chan *dwc, bool drain)
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| {
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| 	u32 cfglo = channel_readl(dwc, CFG_LO);
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| 
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| 	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
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| }
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| 
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| static void dw_dma_resume_chan(struct dw_dma_chan *dwc, bool drain)
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| {
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| 	u32 cfglo = channel_readl(dwc, CFG_LO);
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| 
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| 	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
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| }
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| 
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| static u32 dw_dma_bytes2block(struct dw_dma_chan *dwc,
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| 			      size_t bytes, unsigned int width, size_t *len)
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| {
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| 	u32 block;
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| 
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| 	if ((bytes >> width) > dwc->block_size) {
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| 		block = dwc->block_size;
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| 		*len = dwc->block_size << width;
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| 	} else {
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| 		block = bytes >> width;
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| 		*len = bytes;
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| 	}
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| 
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| 	return block;
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| }
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| 
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| static size_t dw_dma_block2bytes(struct dw_dma_chan *dwc, u32 block, u32 width)
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| {
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| 	return DWC_CTLH_BLOCK_TS(block) << width;
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| }
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| 
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| static inline u8 dw_dma_encode_maxburst(u32 maxburst)
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| {
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| 	/*
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| 	 * Fix burst size according to dw_dmac. We need to convert them as:
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| 	 * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3.
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| 	 */
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| 	return maxburst > 1 ? fls(maxburst) - 2 : 0;
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| }
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| 
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| static u32 dw_dma_prepare_ctllo(struct dw_dma_chan *dwc)
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| {
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| 	struct dma_slave_config	*sconfig = &dwc->dma_sconfig;
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| 	u8 smsize = 0, dmsize = 0;
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| 	u8 sms, dms;
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| 
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| 	if (dwc->direction == DMA_MEM_TO_DEV) {
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| 		sms = dwc->dws.m_master;
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| 		dms = dwc->dws.p_master;
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| 		dmsize = dw_dma_encode_maxburst(sconfig->dst_maxburst);
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| 	} else if (dwc->direction == DMA_DEV_TO_MEM) {
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| 		sms = dwc->dws.p_master;
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| 		dms = dwc->dws.m_master;
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| 		smsize = dw_dma_encode_maxburst(sconfig->src_maxburst);
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| 	} else /* DMA_MEM_TO_MEM */ {
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| 		sms = dwc->dws.m_master;
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| 		dms = dwc->dws.m_master;
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| 	}
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| 
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| 	return DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN |
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| 	       DWC_CTLL_DST_MSIZE(dmsize) | DWC_CTLL_SRC_MSIZE(smsize) |
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| 	       DWC_CTLL_DMS(dms) | DWC_CTLL_SMS(sms);
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| }
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| 
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| static void dw_dma_set_device_name(struct dw_dma *dw, int id)
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| {
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| 	snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id);
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| }
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| 
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| static void dw_dma_disable(struct dw_dma *dw)
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| {
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| 	do_dw_dma_off(dw);
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| }
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| 
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| static void dw_dma_enable(struct dw_dma *dw)
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| {
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| 	do_dw_dma_on(dw);
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| }
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| 
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| int dw_dma_probe(struct dw_dma_chip *chip)
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| {
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| 	struct dw_dma *dw;
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| 
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| 	dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL);
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| 	if (!dw)
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| 		return -ENOMEM;
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| 
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| 	/* Channel operations */
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| 	dw->initialize_chan = dw_dma_initialize_chan;
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| 	dw->suspend_chan = dw_dma_suspend_chan;
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| 	dw->resume_chan = dw_dma_resume_chan;
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| 	dw->prepare_ctllo = dw_dma_prepare_ctllo;
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| 	dw->bytes2block = dw_dma_bytes2block;
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| 	dw->block2bytes = dw_dma_block2bytes;
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| 
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| 	/* Device operations */
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| 	dw->set_device_name = dw_dma_set_device_name;
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| 	dw->disable = dw_dma_disable;
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| 	dw->enable = dw_dma_enable;
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| 
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| 	chip->dw = dw;
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| 	return do_dma_probe(chip);
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| }
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| EXPORT_SYMBOL_GPL(dw_dma_probe);
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| 
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| int dw_dma_remove(struct dw_dma_chip *chip)
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| {
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| 	return do_dma_remove(chip);
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| }
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| EXPORT_SYMBOL_GPL(dw_dma_remove);
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