286 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			286 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * Random Number Generator driver for the Keystone SOC
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|  *
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|  * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com
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|  *
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|  * Authors:	Sandeep Nair
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|  *		Vitaly Andrianov
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|  */
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| 
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| #include <linux/hw_random.h>
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/io.h>
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| #include <linux/platform_device.h>
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| #include <linux/clk.h>
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| #include <linux/pm_runtime.h>
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| #include <linux/err.h>
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| #include <linux/regmap.h>
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| #include <linux/mfd/syscon.h>
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| #include <linux/of.h>
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| #include <linux/of_address.h>
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| #include <linux/delay.h>
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| #include <linux/timekeeping.h>
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| 
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| #define SA_CMD_STATUS_OFS			0x8
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| 
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| /* TRNG enable control in SA System module*/
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| #define SA_CMD_STATUS_REG_TRNG_ENABLE		BIT(3)
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| 
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| /* TRNG start control in TRNG module */
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| #define TRNG_CNTL_REG_TRNG_ENABLE		BIT(10)
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| 
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| /* Data ready indicator in STATUS register */
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| #define TRNG_STATUS_REG_READY			BIT(0)
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| 
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| /* Data ready clear control in INTACK register */
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| #define TRNG_INTACK_REG_READY			BIT(0)
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| 
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| /*
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|  * Number of samples taken to gather entropy during startup.
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|  * If value is 0, the number of samples is 2^24 else
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|  * equals value times 2^8.
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|  */
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| #define TRNG_DEF_STARTUP_CYCLES			0
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| #define TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT	16
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| 
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| /*
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|  * Minimum number of samples taken to regenerate entropy
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|  * If value is 0, the number of samples is 2^24 else
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|  * equals value times 2^6.
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|  */
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| #define TRNG_DEF_MIN_REFILL_CYCLES		1
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| #define TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT	0
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| 
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| /*
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|  * Maximum number of samples taken to regenerate entropy
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|  * If value is 0, the number of samples is 2^24 else
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|  * equals value times 2^8.
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|  */
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| #define TRNG_DEF_MAX_REFILL_CYCLES		0
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| #define TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT	16
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| 
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| /* Number of CLK input cycles between samples */
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| #define TRNG_DEF_CLK_DIV_CYCLES			0
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| #define TRNG_CFG_REG_SAMPLE_DIV_SHIFT		8
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| 
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| /* Maximum retries to get rng data */
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| #define SA_MAX_RNG_DATA_RETRIES			5
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| /* Delay between retries (in usecs) */
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| #define SA_RNG_DATA_RETRY_DELAY			5
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| 
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| struct trng_regs {
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| 	u32	output_l;
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| 	u32	output_h;
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| 	u32	status;
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| 	u32	intmask;
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| 	u32	intack;
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| 	u32	control;
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| 	u32	config;
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| };
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| 
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| struct ks_sa_rng {
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| 	struct device	*dev;
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| 	struct hwrng	rng;
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| 	struct clk	*clk;
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| 	struct regmap	*regmap_cfg;
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| 	struct trng_regs __iomem *reg_rng;
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| 	u64 ready_ts;
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| 	unsigned int refill_delay_ns;
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| };
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| 
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| static unsigned int cycles_to_ns(unsigned long clk_rate, unsigned int cycles)
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| {
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| 	return DIV_ROUND_UP_ULL((TRNG_DEF_CLK_DIV_CYCLES + 1) * 1000000000ull *
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| 				cycles, clk_rate);
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| }
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| 
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| static unsigned int startup_delay_ns(unsigned long clk_rate)
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| {
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| 	if (!TRNG_DEF_STARTUP_CYCLES)
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| 		return cycles_to_ns(clk_rate, BIT(24));
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| 	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_STARTUP_CYCLES);
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| }
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| 
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| static unsigned int refill_delay_ns(unsigned long clk_rate)
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| {
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| 	if (!TRNG_DEF_MAX_REFILL_CYCLES)
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| 		return cycles_to_ns(clk_rate, BIT(24));
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| 	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_MAX_REFILL_CYCLES);
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| }
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| 
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| static int ks_sa_rng_init(struct hwrng *rng)
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| {
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| 	u32 value;
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| 	struct device *dev = (struct device *)rng->priv;
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| 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
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| 	unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk);
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| 
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| 	/* Enable RNG module */
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| 	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
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| 			  SA_CMD_STATUS_REG_TRNG_ENABLE,
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| 			  SA_CMD_STATUS_REG_TRNG_ENABLE);
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| 
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| 	/* Configure RNG module */
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| 	writel(0, &ks_sa_rng->reg_rng->control);
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| 	value = TRNG_DEF_STARTUP_CYCLES << TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT;
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| 	writel(value, &ks_sa_rng->reg_rng->control);
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| 
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| 	value =	(TRNG_DEF_MIN_REFILL_CYCLES <<
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| 		 TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT) |
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| 		(TRNG_DEF_MAX_REFILL_CYCLES <<
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| 		 TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT) |
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| 		(TRNG_DEF_CLK_DIV_CYCLES <<
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| 		 TRNG_CFG_REG_SAMPLE_DIV_SHIFT);
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| 
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| 	writel(value, &ks_sa_rng->reg_rng->config);
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| 
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| 	/* Disable all interrupts from TRNG */
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| 	writel(0, &ks_sa_rng->reg_rng->intmask);
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| 
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| 	/* Enable RNG */
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| 	value = readl(&ks_sa_rng->reg_rng->control);
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| 	value |= TRNG_CNTL_REG_TRNG_ENABLE;
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| 	writel(value, &ks_sa_rng->reg_rng->control);
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| 
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| 	ks_sa_rng->refill_delay_ns = refill_delay_ns(clk_rate);
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| 	ks_sa_rng->ready_ts = ktime_get_ns() +
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| 			      startup_delay_ns(clk_rate);
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| 
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| 	return 0;
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| }
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| 
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| static void ks_sa_rng_cleanup(struct hwrng *rng)
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| {
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| 	struct device *dev = (struct device *)rng->priv;
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| 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
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| 
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| 	/* Disable RNG */
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| 	writel(0, &ks_sa_rng->reg_rng->control);
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| 	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
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| 			  SA_CMD_STATUS_REG_TRNG_ENABLE, 0);
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| }
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| 
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| static int ks_sa_rng_data_read(struct hwrng *rng, u32 *data)
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| {
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| 	struct device *dev = (struct device *)rng->priv;
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| 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
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| 
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| 	/* Read random data */
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| 	data[0] = readl(&ks_sa_rng->reg_rng->output_l);
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| 	data[1] = readl(&ks_sa_rng->reg_rng->output_h);
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| 
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| 	writel(TRNG_INTACK_REG_READY, &ks_sa_rng->reg_rng->intack);
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| 	ks_sa_rng->ready_ts = ktime_get_ns() + ks_sa_rng->refill_delay_ns;
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| 
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| 	return sizeof(u32) * 2;
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| }
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| 
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| static int ks_sa_rng_data_present(struct hwrng *rng, int wait)
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| {
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| 	struct device *dev = (struct device *)rng->priv;
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| 	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
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| 	u64 now = ktime_get_ns();
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| 
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| 	u32	ready;
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| 	int	j;
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| 
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| 	if (wait && now < ks_sa_rng->ready_ts) {
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| 		/* Max delay expected here is 81920000 ns */
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| 		unsigned long min_delay =
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| 			DIV_ROUND_UP((u32)(ks_sa_rng->ready_ts - now), 1000);
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| 
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| 		usleep_range(min_delay, min_delay + SA_RNG_DATA_RETRY_DELAY);
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| 	}
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| 
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| 	for (j = 0; j < SA_MAX_RNG_DATA_RETRIES; j++) {
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| 		ready = readl(&ks_sa_rng->reg_rng->status);
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| 		ready &= TRNG_STATUS_REG_READY;
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| 
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| 		if (ready || !wait)
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| 			break;
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| 
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| 		udelay(SA_RNG_DATA_RETRY_DELAY);
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| 	}
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| 
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| 	return ready;
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| }
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| 
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| static int ks_sa_rng_probe(struct platform_device *pdev)
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| {
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| 	struct ks_sa_rng	*ks_sa_rng;
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| 	struct device		*dev = &pdev->dev;
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| 	int			ret;
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| 
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| 	ks_sa_rng = devm_kzalloc(dev, sizeof(*ks_sa_rng), GFP_KERNEL);
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| 	if (!ks_sa_rng)
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| 		return -ENOMEM;
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| 
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| 	ks_sa_rng->dev = dev;
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| 	ks_sa_rng->rng = (struct hwrng) {
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| 		.name = "ks_sa_hwrng",
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| 		.init = ks_sa_rng_init,
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| 		.data_read = ks_sa_rng_data_read,
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| 		.data_present = ks_sa_rng_data_present,
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| 		.cleanup = ks_sa_rng_cleanup,
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| 	};
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| 	ks_sa_rng->rng.priv = (unsigned long)dev;
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| 
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| 	ks_sa_rng->reg_rng = devm_platform_ioremap_resource(pdev, 0);
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| 	if (IS_ERR(ks_sa_rng->reg_rng))
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| 		return PTR_ERR(ks_sa_rng->reg_rng);
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| 
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| 	ks_sa_rng->regmap_cfg =
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| 		syscon_regmap_lookup_by_phandle(dev->of_node,
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| 						"ti,syscon-sa-cfg");
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| 
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| 	if (IS_ERR(ks_sa_rng->regmap_cfg)) {
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| 		dev_err(dev, "syscon_node_to_regmap failed\n");
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| 		return -EINVAL;
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| 	}
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| 
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| 	pm_runtime_enable(dev);
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| 	ret = pm_runtime_resume_and_get(dev);
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| 	if (ret < 0) {
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| 		dev_err(dev, "Failed to enable SA power-domain\n");
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| 		pm_runtime_disable(dev);
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| 		return ret;
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| 	}
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| 
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| 	platform_set_drvdata(pdev, ks_sa_rng);
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| 
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| 	return devm_hwrng_register(&pdev->dev, &ks_sa_rng->rng);
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| }
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| 
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| static int ks_sa_rng_remove(struct platform_device *pdev)
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| {
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| 	pm_runtime_put_sync(&pdev->dev);
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| 	pm_runtime_disable(&pdev->dev);
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| 
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| 	return 0;
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| }
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| 
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| static const struct of_device_id ks_sa_rng_dt_match[] = {
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| 	{
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| 		.compatible = "ti,keystone-rng",
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| 	},
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| 	{ },
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| };
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| MODULE_DEVICE_TABLE(of, ks_sa_rng_dt_match);
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| 
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| static struct platform_driver ks_sa_rng_driver = {
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| 	.driver		= {
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| 		.name	= "ks-sa-rng",
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| 		.of_match_table = ks_sa_rng_dt_match,
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| 	},
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| 	.probe		= ks_sa_rng_probe,
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| 	.remove		= ks_sa_rng_remove,
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| };
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| 
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| module_platform_driver(ks_sa_rng_driver);
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| 
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| MODULE_DESCRIPTION("Keystone NETCP SA H/W Random Number Generator driver");
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| MODULE_AUTHOR("Vitaly Andrianov <vitalya@ti.com>");
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| MODULE_LICENSE("GPL");
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