131 lines
4.3 KiB
Plaintext
131 lines
4.3 KiB
Plaintext
Amlogic Meson GX DWC3 USB SoC controller
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Required properties:
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- compatible: depending on the SoC this should contain one of:
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* amlogic,meson-axg-dwc3
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* amlogic,meson-gxl-dwc3
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- clocks: a handle for the "USB general" clock
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- clock-names: must be "usb_general"
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- resets: a handle for the shared "USB OTG" reset line
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- reset-names: must be "usb_otg"
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Required child node:
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A child node must exist to represent the core DWC3 IP block. The name of
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the node is not important. The content of the node is defined in dwc3.txt.
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PHY documentation is provided in the following places:
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- Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt
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- Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt
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Example device nodes:
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usb0: usb@ff500000 {
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compatible = "amlogic,meson-axg-dwc3";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&clkc CLKID_USB>;
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clock-names = "usb_general";
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resets = <&reset RESET_USB_OTG>;
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reset-names = "usb_otg";
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dwc3: dwc3@ff500000 {
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compatible = "snps,dwc3";
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reg = <0x0 0xff500000 0x0 0x100000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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dr_mode = "host";
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maximum-speed = "high-speed";
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snps,dis_u2_susphy_quirk;
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phys = <&usb3_phy>, <&usb2_phy0>;
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phy-names = "usb2-phy", "usb3-phy";
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};
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};
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Amlogic Meson G12A DWC3 USB SoC Controller Glue
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The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
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in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
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only.
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A glue connects the DWC3 core to USB2 PHYs and optionnaly to an USB3 PHY.
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One of the USB2 PHY can be re-routed in peripheral mode to a DWC2 USB IP.
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The DWC3 Glue controls the PHY routing and power, an interrupt line is
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connected to the Glue to serve as OTG ID change detection.
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Required properties:
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- compatible: Should be "amlogic,meson-g12a-usb-ctrl"
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- clocks: a handle for the "USB" clock
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- resets: a handle for the shared "USB" reset line
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- reg: The base address and length of the registers
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- interrupts: the interrupt specifier for the OTG detection
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- phys: handle to used PHYs on the system
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- a <0> phandle can be used if a PHY is not used
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- phy-names: names of the used PHYs on the system :
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- "usb2-phy0" for USB2 PHY0 if USBHOST_A port is used
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- "usb2-phy1" for USB2 PHY1 if USBOTG_B port is used
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- "usb3-phy0" for USB3 PHY if USB3_0 is used
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- dr_mode: should be "host", "peripheral", or "otg" depending on
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the usage and configuration of the OTG Capable port.
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- "host" and "peripheral" means a fixed Host or Device only connection
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- "otg" means the port can be used as both Host or Device and
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be switched automatically using the OTG ID pin.
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Optional properties:
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- vbus-supply: should be a phandle to the regulator controlling the VBUS
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power supply when used in OTG switchable mode
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Required child nodes:
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A child node must exist to represent the core DWC3 IP block. The name of
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the node is not important. The content of the node is defined in dwc3.txt.
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A child node must exist to represent the core DWC2 IP block. The name of
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the node is not important. The content of the node is defined in dwc2.txt.
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PHY documentation is provided in the following places:
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- Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt
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- Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
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Example device nodes:
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usb: usb@ffe09000 {
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compatible = "amlogic,meson-g12a-usb-ctrl";
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reg = <0x0 0xffe09000 0x0 0xa0>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&clkc CLKID_USB>;
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resets = <&reset RESET_USB>;
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dr_mode = "otg";
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phys = <&usb2_phy0>, <&usb2_phy1>,
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<&usb3_pcie_phy PHY_TYPE_USB3>;
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phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
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dwc2: usb@ff400000 {
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compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
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reg = <0x0 0xff400000 0x0 0x40000>;
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interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
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clock-names = "ddr";
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phys = <&usb2_phy1>;
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dr_mode = "peripheral";
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g-rx-fifo-size = <192>;
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g-np-tx-fifo-size = <128>;
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g-tx-fifo-size = <128 128 16 16 16>;
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};
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dwc3: usb@ff500000 {
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compatible = "snps,dwc3";
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reg = <0x0 0xff500000 0x0 0x100000>;
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interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
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dr_mode = "host";
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snps,dis_u2_susphy_quirk;
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snps,quirk-frame-length-adjustment;
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};
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};
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