27 lines
		
	
	
		
			839 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			27 lines
		
	
	
		
			839 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| NVIDIA Tegra20 MC(Memory Controller)
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| 
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| Required properties:
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| - compatible : "nvidia,tegra20-mc"
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| - reg : Should contain 2 register ranges(address and length); see the
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|   example below. Note that the MC registers are interleaved with the
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|   GART registers, and hence must be represented as multiple ranges.
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| - interrupts : Should contain MC General interrupt.
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| - #reset-cells : Should be 1. This cell represents memory client module ID.
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|   The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>
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|   or in the TRM documentation.
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| 
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| Example:
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| 	mc: memory-controller@7000f000 {
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| 		compatible = "nvidia,tegra20-mc";
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| 		reg = <0x7000f000 0x024
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| 		       0x7000f03c 0x3c4>;
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| 		interrupts = <0 77 0x04>;
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| 		#reset-cells = <1>;
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| 	};
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| 
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| 	video-codec@6001a000 {
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| 		compatible = "nvidia,tegra20-vde";
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| 		...
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| 		resets = <&mc TEGRA20_MC_RESET_VDE>;
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| 	};
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