77 lines
1.7 KiB
YAML
77 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dpll/dpll-device.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Digital Phase-Locked Loop (DPLL) Device
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maintainers:
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- Ivan Vecera <ivecera@redhat.com>
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description:
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Digital Phase-Locked Loop (DPLL) device is used for precise clock
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synchronization in networking and telecom hardware. The device can
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have one or more channels (DPLLs) and one or more physical input and
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output pins. Each DPLL channel can either produce pulse-per-clock signal
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or drive ethernet equipment clock. The type of each channel can be
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indicated by dpll-types property.
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properties:
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$nodename:
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pattern: "^dpll(@.*)?$"
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"#address-cells":
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const: 0
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"#size-cells":
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const: 0
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dpll-types:
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description: List of DPLL channel types, one per DPLL instance.
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$ref: /schemas/types.yaml#/definitions/non-unique-string-array
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items:
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enum: [pps, eec]
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input-pins:
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type: object
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description: DPLL input pins
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unevaluatedProperties: false
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^pin@[0-9a-f]+$":
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$ref: /schemas/dpll/dpll-pin.yaml
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unevaluatedProperties: false
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required:
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- "#address-cells"
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- "#size-cells"
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output-pins:
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type: object
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description: DPLL output pins
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unevaluatedProperties: false
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^pin@[0-9]+$":
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$ref: /schemas/dpll/dpll-pin.yaml
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unevaluatedProperties: false
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required:
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- "#address-cells"
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- "#size-cells"
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additionalProperties: true
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