270 lines
		
	
	
		
			7.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			270 lines
		
	
	
		
			7.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0 OR MIT)
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| //
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| // Copyright (c) 2018 BayLibre, SAS.
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| // Author: Jerome Brunet <jbrunet@baylibre.com>
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| 
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| #include <linux/module.h>
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| #include <linux/of_platform.h>
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| #include <linux/regmap.h>
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| #include <sound/soc.h>
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| #include <sound/soc-dai.h>
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| 
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| #include "axg-tdm-formatter.h"
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| 
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| #define TDMIN_CTRL			0x00
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| #define  TDMIN_CTRL_ENABLE		BIT(31)
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| #define  TDMIN_CTRL_I2S_MODE		BIT(30)
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| #define  TDMIN_CTRL_RST_OUT		BIT(29)
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| #define  TDMIN_CTRL_RST_IN		BIT(28)
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| #define  TDMIN_CTRL_WS_INV		BIT(25)
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| #define  TDMIN_CTRL_SEL_SHIFT		20
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| #define  TDMIN_CTRL_IN_BIT_SKEW_MASK	GENMASK(18, 16)
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| #define  TDMIN_CTRL_IN_BIT_SKEW(x)	((x) << 16)
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| #define  TDMIN_CTRL_LSB_FIRST		BIT(5)
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| #define  TDMIN_CTRL_BITNUM_MASK	GENMASK(4, 0)
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| #define  TDMIN_CTRL_BITNUM(x)		((x) << 0)
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| #define TDMIN_SWAP			0x04
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| #define TDMIN_MASK0			0x08
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| #define TDMIN_MASK1			0x0c
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| #define TDMIN_MASK2			0x10
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| #define TDMIN_MASK3			0x14
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| #define TDMIN_STAT			0x18
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| #define TDMIN_MUTE_VAL			0x1c
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| #define TDMIN_MUTE0			0x20
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| #define TDMIN_MUTE1			0x24
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| #define TDMIN_MUTE2			0x28
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| #define TDMIN_MUTE3			0x2c
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| 
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| static const struct regmap_config axg_tdmin_regmap_cfg = {
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| 	.reg_bits	= 32,
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| 	.val_bits	= 32,
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| 	.reg_stride	= 4,
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| 	.max_register	= TDMIN_MUTE3,
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| };
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| 
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| static const char * const axg_tdmin_sel_texts[] = {
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| 	"IN 0", "IN 1", "IN 2",  "IN 3",  "IN 4",  "IN 5",  "IN 6",  "IN 7",
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| 	"IN 8", "IN 9", "IN 10", "IN 11", "IN 12", "IN 13", "IN 14", "IN 15",
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| };
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| 
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| /* Change to special mux control to reset dapm */
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| static SOC_ENUM_SINGLE_DECL(axg_tdmin_sel_enum, TDMIN_CTRL,
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| 			    TDMIN_CTRL_SEL_SHIFT, axg_tdmin_sel_texts);
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| 
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| static const struct snd_kcontrol_new axg_tdmin_in_mux =
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| 	SOC_DAPM_ENUM("Input Source", axg_tdmin_sel_enum);
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| 
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| static struct snd_soc_dai *
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| axg_tdmin_get_be(struct snd_soc_dapm_widget *w)
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| {
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| 	struct snd_soc_dapm_path *p = NULL;
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| 	struct snd_soc_dai *be;
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| 
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| 	snd_soc_dapm_widget_for_each_source_path(w, p) {
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| 		if (!p->connect)
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| 			continue;
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| 
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| 		if (p->source->id == snd_soc_dapm_dai_out)
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| 			return (struct snd_soc_dai *)p->source->priv;
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| 
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| 		be = axg_tdmin_get_be(p->source);
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| 		if (be)
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| 			return be;
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| 	}
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| 
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| 	return NULL;
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| }
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| 
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| static struct axg_tdm_stream *
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| axg_tdmin_get_tdm_stream(struct snd_soc_dapm_widget *w)
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| {
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| 	struct snd_soc_dai *be = axg_tdmin_get_be(w);
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| 
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| 	if (!be)
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| 		return NULL;
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| 
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| 	return be->capture_dma_data;
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| }
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| 
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| static void axg_tdmin_enable(struct regmap *map)
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| {
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| 	/* Apply both reset */
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| 	regmap_update_bits(map, TDMIN_CTRL,
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| 			   TDMIN_CTRL_RST_OUT | TDMIN_CTRL_RST_IN, 0);
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| 
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| 	/* Clear out reset before in reset */
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| 	regmap_update_bits(map, TDMIN_CTRL,
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| 			   TDMIN_CTRL_RST_OUT, TDMIN_CTRL_RST_OUT);
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| 	regmap_update_bits(map, TDMIN_CTRL,
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| 			   TDMIN_CTRL_RST_IN,  TDMIN_CTRL_RST_IN);
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| 
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| 	/* Actually enable tdmin */
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| 	regmap_update_bits(map, TDMIN_CTRL,
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| 			   TDMIN_CTRL_ENABLE, TDMIN_CTRL_ENABLE);
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| }
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| 
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| static void axg_tdmin_disable(struct regmap *map)
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| {
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| 	regmap_update_bits(map, TDMIN_CTRL, TDMIN_CTRL_ENABLE, 0);
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| }
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| 
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| static int axg_tdmin_prepare(struct regmap *map,
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| 			     const struct axg_tdm_formatter_hw *quirks,
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| 			     struct axg_tdm_stream *ts)
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| {
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| 	unsigned int val, skew = quirks->skew_offset;
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| 
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| 	/* Set stream skew */
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| 	switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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| 	case SND_SOC_DAIFMT_I2S:
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| 	case SND_SOC_DAIFMT_DSP_A:
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| 		skew += 1;
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| 		break;
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| 
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| 	case SND_SOC_DAIFMT_LEFT_J:
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| 	case SND_SOC_DAIFMT_DSP_B:
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| 		break;
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| 
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| 	default:
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| 		pr_err("Unsupported format: %u\n",
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| 		       ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK);
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| 		return -EINVAL;
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| 	}
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| 
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| 	val = TDMIN_CTRL_IN_BIT_SKEW(skew);
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| 
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| 	/* Set stream format mode */
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| 	switch (ts->iface->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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| 	case SND_SOC_DAIFMT_I2S:
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| 	case SND_SOC_DAIFMT_LEFT_J:
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| 	case SND_SOC_DAIFMT_RIGHT_J:
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| 		val |= TDMIN_CTRL_I2S_MODE;
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| 		break;
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| 	}
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| 
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| 	/* If the sample clock is inverted, invert it back for the formatter */
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| 	if (axg_tdm_lrclk_invert(ts->iface->fmt))
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| 		val |= TDMIN_CTRL_WS_INV;
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| 
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| 	/* Set the slot width */
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| 	val |= TDMIN_CTRL_BITNUM(ts->iface->slot_width - 1);
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| 
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| 	/*
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| 	 * The following also reset LSB_FIRST which result in the formatter
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| 	 * placing the first bit received at bit 31
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| 	 */
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| 	regmap_update_bits(map, TDMIN_CTRL,
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| 			   (TDMIN_CTRL_IN_BIT_SKEW_MASK | TDMIN_CTRL_WS_INV |
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| 			    TDMIN_CTRL_I2S_MODE | TDMIN_CTRL_LSB_FIRST |
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| 			    TDMIN_CTRL_BITNUM_MASK), val);
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| 
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| 	/* Set static swap mask configuration */
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| 	regmap_write(map, TDMIN_SWAP, 0x76543210);
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| 
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| 	return axg_tdm_formatter_set_channel_masks(map, ts, TDMIN_MASK0);
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| }
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| 
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| static const struct snd_soc_dapm_widget axg_tdmin_dapm_widgets[] = {
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| 	SND_SOC_DAPM_AIF_IN("IN 0",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 1",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 2",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 3",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 4",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 5",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 6",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 7",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 8",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 9",  NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 10", NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 11", NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 12", NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 13", NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 14", NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_AIF_IN("IN 15", NULL, 0, SND_SOC_NOPM, 0, 0),
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| 	SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &axg_tdmin_in_mux),
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| 	SND_SOC_DAPM_PGA_E("DEC", SND_SOC_NOPM, 0, 0, NULL, 0,
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| 			   axg_tdm_formatter_event,
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| 			   (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD)),
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| 	SND_SOC_DAPM_AIF_OUT("OUT", NULL, 0, SND_SOC_NOPM, 0, 0),
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| };
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| 
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| static const struct snd_soc_dapm_route axg_tdmin_dapm_routes[] = {
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| 	{ "SRC SEL", "IN 0",  "IN 0" },
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| 	{ "SRC SEL", "IN 1",  "IN 1" },
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| 	{ "SRC SEL", "IN 2",  "IN 2" },
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| 	{ "SRC SEL", "IN 3",  "IN 3" },
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| 	{ "SRC SEL", "IN 4",  "IN 4" },
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| 	{ "SRC SEL", "IN 5",  "IN 5" },
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| 	{ "SRC SEL", "IN 6",  "IN 6" },
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| 	{ "SRC SEL", "IN 7",  "IN 7" },
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| 	{ "SRC SEL", "IN 8",  "IN 8" },
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| 	{ "SRC SEL", "IN 9",  "IN 9" },
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| 	{ "SRC SEL", "IN 10", "IN 10" },
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| 	{ "SRC SEL", "IN 11", "IN 11" },
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| 	{ "SRC SEL", "IN 12", "IN 12" },
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| 	{ "SRC SEL", "IN 13", "IN 13" },
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| 	{ "SRC SEL", "IN 14", "IN 14" },
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| 	{ "SRC SEL", "IN 15", "IN 15" },
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| 	{ "DEC", NULL, "SRC SEL" },
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| 	{ "OUT", NULL, "DEC" },
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| };
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| 
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| static const struct snd_soc_component_driver axg_tdmin_component_drv = {
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| 	.dapm_widgets		= axg_tdmin_dapm_widgets,
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| 	.num_dapm_widgets	= ARRAY_SIZE(axg_tdmin_dapm_widgets),
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| 	.dapm_routes		= axg_tdmin_dapm_routes,
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| 	.num_dapm_routes	= ARRAY_SIZE(axg_tdmin_dapm_routes),
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| };
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| 
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| static const struct axg_tdm_formatter_ops axg_tdmin_ops = {
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| 	.get_stream	= axg_tdmin_get_tdm_stream,
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| 	.prepare	= axg_tdmin_prepare,
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| 	.enable		= axg_tdmin_enable,
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| 	.disable	= axg_tdmin_disable,
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| };
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| 
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| static const struct axg_tdm_formatter_driver axg_tdmin_drv = {
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| 	.component_drv	= &axg_tdmin_component_drv,
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| 	.regmap_cfg	= &axg_tdmin_regmap_cfg,
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| 	.ops		= &axg_tdmin_ops,
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| 	.quirks		= &(const struct axg_tdm_formatter_hw) {
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| 		.skew_offset	= 2,
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| 	},
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| };
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| 
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| static const struct axg_tdm_formatter_driver g12a_tdmin_drv = {
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| 	.component_drv	= &axg_tdmin_component_drv,
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| 	.regmap_cfg	= &axg_tdmin_regmap_cfg,
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| 	.ops		= &axg_tdmin_ops,
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| 	.quirks		= &(const struct axg_tdm_formatter_hw) {
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| 		.skew_offset	= 3,
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| 	},
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| };
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| 
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| static const struct of_device_id axg_tdmin_of_match[] = {
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| 	{
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| 		.compatible = "amlogic,axg-tdmin",
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| 		.data = &axg_tdmin_drv,
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| 	}, {
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| 		.compatible = "amlogic,g12a-tdmin",
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| 		.data = &g12a_tdmin_drv,
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| 	}, {
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| 		.compatible = "amlogic,sm1-tdmin",
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| 		.data = &g12a_tdmin_drv,
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| 	}, {}
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| };
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| MODULE_DEVICE_TABLE(of, axg_tdmin_of_match);
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| 
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| static struct platform_driver axg_tdmin_pdrv = {
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| 	.probe = axg_tdm_formatter_probe,
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| 	.driver = {
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| 		.name = "axg-tdmin",
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| 		.of_match_table = axg_tdmin_of_match,
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| 	},
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| };
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| module_platform_driver(axg_tdmin_pdrv);
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| 
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| MODULE_DESCRIPTION("Amlogic AXG TDM input formatter driver");
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| MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
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| MODULE_LICENSE("GPL v2");
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