43 lines
1.5 KiB
Plaintext
43 lines
1.5 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
|
|
#
|
|
|
|
config AMD_AE4DMA
|
|
tristate "AMD AE4DMA Engine"
|
|
depends on (X86_64 || COMPILE_TEST) && PCI
|
|
depends on AMD_PTDMA
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the AMD AE4DMA controller. This controller
|
|
provides DMA capabilities to perform high bandwidth memory to
|
|
memory and IO copy operations. It performs DMA transfer through
|
|
queue-based descriptor management. This DMA controller is intended
|
|
to be used with AMD Non-Transparent Bridge devices and not for
|
|
general purpose peripheral DMA.
|
|
|
|
config AMD_PTDMA
|
|
tristate "AMD PassThru DMA Engine"
|
|
depends on X86_64 && PCI
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the AMD PTDMA controller. This controller
|
|
provides DMA capabilities to perform high bandwidth memory to
|
|
memory and IO copy operations. It performs DMA transfer through
|
|
queue-based descriptor management. This DMA controller is intended
|
|
to be used with AMD Non-Transparent Bridge devices and not for
|
|
general purpose peripheral DMA.
|
|
|
|
config AMD_QDMA
|
|
tristate "AMD Queue-based DMA"
|
|
depends on HAS_IOMEM
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
select REGMAP_MMIO
|
|
help
|
|
Enable support for the AMD Queue-based DMA subsystem. The primary
|
|
mechanism to transfer data using the QDMA is for the QDMA engine to
|
|
operate on instructions (descriptors) provided by the host operating
|
|
system. Using the descriptors, the QDMA can move data in either the
|
|
Host to Card (H2C) direction or the Card to Host (C2H) direction.
|