72 lines
1.3 KiB
C
72 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* RISC-V Arch Timer(sstc) specific interface
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*
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* Copyright (c) 2024 Intel Corporation
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*/
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#ifndef SELFTEST_KVM_ARCH_TIMER_H
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#define SELFTEST_KVM_ARCH_TIMER_H
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#include <asm/csr.h>
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#include <asm/vdso/processor.h>
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static unsigned long timer_freq;
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#define msec_to_cycles(msec) \
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((timer_freq) * (uint64_t)(msec) / 1000)
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#define usec_to_cycles(usec) \
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((timer_freq) * (uint64_t)(usec) / 1000000)
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#define cycles_to_usec(cycles) \
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((uint64_t)(cycles) * 1000000 / (timer_freq))
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static inline uint64_t timer_get_cycles(void)
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{
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return csr_read(CSR_TIME);
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}
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static inline void timer_set_cmp(uint64_t cval)
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{
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csr_write(CSR_STIMECMP, cval);
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}
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static inline uint64_t timer_get_cmp(void)
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{
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return csr_read(CSR_STIMECMP);
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}
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static inline void timer_irq_enable(void)
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{
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csr_set(CSR_SIE, IE_TIE);
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}
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static inline void timer_irq_disable(void)
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{
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csr_clear(CSR_SIE, IE_TIE);
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}
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static inline void timer_set_next_cmp_ms(uint32_t msec)
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{
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uint64_t now_ct = timer_get_cycles();
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uint64_t next_ct = now_ct + msec_to_cycles(msec);
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timer_set_cmp(next_ct);
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}
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static inline void __delay(uint64_t cycles)
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{
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uint64_t start = timer_get_cycles();
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while ((timer_get_cycles() - start) < cycles)
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cpu_relax();
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}
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static inline void udelay(unsigned long usec)
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{
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__delay(usec_to_cycles(usec));
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}
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#endif /* SELFTEST_KVM_ARCH_TIMER_H */
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