63 lines
1.3 KiB
C
63 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __VDSO_MATH64_H
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#define __VDSO_MATH64_H
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static __always_inline u32
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__iter_div_u64_rem(u64 dividend, u32 divisor, u64 *remainder)
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{
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u32 ret = 0;
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while (dividend >= divisor) {
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/* The following asm() prevents the compiler from
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optimising this loop into a modulo operation. */
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asm("" : "+rm"(dividend));
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dividend -= divisor;
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ret++;
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}
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*remainder = dividend;
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return ret;
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}
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#if defined(CONFIG_ARCH_SUPPORTS_INT128) && defined(__SIZEOF_INT128__)
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#ifndef mul_u64_u32_add_u64_shr
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static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, unsigned int shift)
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{
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return (u64)((((unsigned __int128)a * mul) + b) >> shift);
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}
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#endif /* mul_u64_u32_add_u64_shr */
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#else
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#ifndef mul_u64_u32_add_u64_shr
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#ifndef mul_u32_u32
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static inline u64 mul_u32_u32(u32 a, u32 b)
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{
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return (u64)a * b;
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}
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#define mul_u32_u32 mul_u32_u32
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#endif
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static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, unsigned int shift)
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{
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u32 ah = a >> 32, al = a;
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bool ovf;
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u64 ret;
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ovf = __builtin_add_overflow(mul_u32_u32(al, mul), b, &ret);
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ret >>= shift;
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if (ovf && shift)
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ret += 1ULL << (64 - shift);
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if (ah)
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ret += mul_u32_u32(ah, mul) << (32 - shift);
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return ret;
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}
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#endif /* mul_u64_u32_add_u64_shr */
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#endif
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#endif /* __VDSO_MATH64_H */
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