177 lines
4.4 KiB
C
177 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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/*
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* Copyright (C) 2023 Sophgo Ltd.
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*/
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#ifndef __DT_BINDINGS_SOPHGO_CV1800_CLK_H__
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#define __DT_BINDINGS_SOPHGO_CV1800_CLK_H__
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#define CLK_MPLL 0
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#define CLK_TPLL 1
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#define CLK_FPLL 2
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#define CLK_MIPIMPLL 3
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#define CLK_A0PLL 4
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#define CLK_DISPPLL 5
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#define CLK_CAM0PLL 6
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#define CLK_CAM1PLL 7
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#define CLK_MIPIMPLL_D3 8
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#define CLK_CAM0PLL_D2 9
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#define CLK_CAM0PLL_D3 10
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#define CLK_TPU 11
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#define CLK_TPU_FAB 12
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#define CLK_AHB_ROM 13
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#define CLK_DDR_AXI_REG 14
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#define CLK_RTC_25M 15
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#define CLK_SRC_RTC_SYS_0 16
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#define CLK_TEMPSEN 17
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#define CLK_SARADC 18
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#define CLK_EFUSE 19
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#define CLK_APB_EFUSE 20
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#define CLK_DEBUG 21
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#define CLK_AP_DEBUG 22
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#define CLK_XTAL_MISC 23
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#define CLK_AXI4_EMMC 24
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#define CLK_EMMC 25
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#define CLK_EMMC_100K 26
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#define CLK_AXI4_SD0 27
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#define CLK_SD0 28
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#define CLK_SD0_100K 29
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#define CLK_AXI4_SD1 30
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#define CLK_SD1 31
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#define CLK_SD1_100K 32
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#define CLK_SPI_NAND 33
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#define CLK_ETH0_500M 34
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#define CLK_AXI4_ETH0 35
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#define CLK_ETH1_500M 36
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#define CLK_AXI4_ETH1 37
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#define CLK_APB_GPIO 38
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#define CLK_APB_GPIO_INTR 39
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#define CLK_GPIO_DB 40
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#define CLK_AHB_SF 41
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#define CLK_AHB_SF1 42
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#define CLK_A24M 43
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#define CLK_AUDSRC 44
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#define CLK_APB_AUDSRC 45
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#define CLK_SDMA_AXI 46
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#define CLK_SDMA_AUD0 47
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#define CLK_SDMA_AUD1 48
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#define CLK_SDMA_AUD2 49
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#define CLK_SDMA_AUD3 50
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#define CLK_I2C 51
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#define CLK_APB_I2C 52
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#define CLK_APB_I2C0 53
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#define CLK_APB_I2C1 54
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#define CLK_APB_I2C2 55
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#define CLK_APB_I2C3 56
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#define CLK_APB_I2C4 57
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#define CLK_APB_WDT 58
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#define CLK_PWM_SRC 59
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#define CLK_PWM 60
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#define CLK_SPI 61
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#define CLK_APB_SPI0 62
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#define CLK_APB_SPI1 63
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#define CLK_APB_SPI2 64
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#define CLK_APB_SPI3 65
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#define CLK_1M 66
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#define CLK_CAM0_200 67
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#define CLK_PM 68
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#define CLK_TIMER0 69
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#define CLK_TIMER1 70
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#define CLK_TIMER2 71
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#define CLK_TIMER3 72
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#define CLK_TIMER4 73
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#define CLK_TIMER5 74
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#define CLK_TIMER6 75
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#define CLK_TIMER7 76
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#define CLK_UART0 77
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#define CLK_APB_UART0 78
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#define CLK_UART1 79
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#define CLK_APB_UART1 80
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#define CLK_UART2 81
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#define CLK_APB_UART2 82
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#define CLK_UART3 83
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#define CLK_APB_UART3 84
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#define CLK_UART4 85
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#define CLK_APB_UART4 86
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#define CLK_APB_I2S0 87
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#define CLK_APB_I2S1 88
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#define CLK_APB_I2S2 89
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#define CLK_APB_I2S3 90
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#define CLK_AXI4_USB 91
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#define CLK_APB_USB 92
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#define CLK_USB_125M 93
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#define CLK_USB_33K 94
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#define CLK_USB_12M 95
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#define CLK_AXI4 96
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#define CLK_AXI6 97
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#define CLK_DSI_ESC 98
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#define CLK_AXI_VIP 99
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#define CLK_SRC_VIP_SYS_0 100
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#define CLK_SRC_VIP_SYS_1 101
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#define CLK_SRC_VIP_SYS_2 102
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#define CLK_SRC_VIP_SYS_3 103
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#define CLK_SRC_VIP_SYS_4 104
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#define CLK_CSI_BE_VIP 105
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#define CLK_CSI_MAC0_VIP 106
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#define CLK_CSI_MAC1_VIP 107
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#define CLK_CSI_MAC2_VIP 108
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#define CLK_CSI0_RX_VIP 109
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#define CLK_CSI1_RX_VIP 110
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#define CLK_ISP_TOP_VIP 111
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#define CLK_IMG_D_VIP 112
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#define CLK_IMG_V_VIP 113
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#define CLK_SC_TOP_VIP 114
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#define CLK_SC_D_VIP 115
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#define CLK_SC_V1_VIP 116
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#define CLK_SC_V2_VIP 117
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#define CLK_SC_V3_VIP 118
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#define CLK_DWA_VIP 119
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#define CLK_BT_VIP 120
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#define CLK_DISP_VIP 121
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#define CLK_DSI_MAC_VIP 122
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#define CLK_LVDS0_VIP 123
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#define CLK_LVDS1_VIP 124
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#define CLK_PAD_VI_VIP 125
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#define CLK_PAD_VI1_VIP 126
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#define CLK_PAD_VI2_VIP 127
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#define CLK_CFG_REG_VIP 128
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#define CLK_VIP_IP0 129
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#define CLK_VIP_IP1 130
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#define CLK_VIP_IP2 131
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#define CLK_VIP_IP3 132
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#define CLK_IVE_VIP 133
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#define CLK_RAW_VIP 134
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#define CLK_OSDC_VIP 135
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#define CLK_CAM0_VIP 136
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#define CLK_AXI_VIDEO_CODEC 137
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#define CLK_VC_SRC0 138
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#define CLK_VC_SRC1 139
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#define CLK_VC_SRC2 140
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#define CLK_H264C 141
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#define CLK_APB_H264C 142
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#define CLK_H265C 143
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#define CLK_APB_H265C 144
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#define CLK_JPEG 145
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#define CLK_APB_JPEG 146
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#define CLK_CAM0 147
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#define CLK_CAM1 148
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#define CLK_WGN 149
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#define CLK_WGN0 150
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#define CLK_WGN1 151
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#define CLK_WGN2 152
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#define CLK_KEYSCAN 153
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#define CLK_CFG_REG_VC 154
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#define CLK_C906_0 155
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#define CLK_C906_1 156
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#define CLK_A53 157
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#define CLK_CPU_AXI0 158
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#define CLK_CPU_GIC 159
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#define CLK_XTAL_AP 160
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// Only for CV181x
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#define CLK_DISP_SRC_VIP 161
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#endif /* __DT_BINDINGS_SOPHGO_CV1800_CLK_H__ */
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