136 lines
4.5 KiB
C
136 lines
4.5 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_CAM_CC_X1E80100_H
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#define _DT_BINDINGS_CLK_QCOM_CAM_CC_X1E80100_H
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/* CAM_CC clocks */
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#define CAM_CC_BPS_AHB_CLK 0
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#define CAM_CC_BPS_CLK 1
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#define CAM_CC_BPS_CLK_SRC 2
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#define CAM_CC_BPS_FAST_AHB_CLK 3
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#define CAM_CC_CAMNOC_AXI_NRT_CLK 4
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#define CAM_CC_CAMNOC_AXI_RT_CLK 5
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#define CAM_CC_CAMNOC_AXI_RT_CLK_SRC 6
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#define CAM_CC_CAMNOC_DCD_XO_CLK 7
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#define CAM_CC_CAMNOC_XO_CLK 8
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#define CAM_CC_CCI_0_CLK 9
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#define CAM_CC_CCI_0_CLK_SRC 10
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#define CAM_CC_CCI_1_CLK 11
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#define CAM_CC_CCI_1_CLK_SRC 12
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#define CAM_CC_CORE_AHB_CLK 13
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#define CAM_CC_CPAS_AHB_CLK 14
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#define CAM_CC_CPAS_BPS_CLK 15
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#define CAM_CC_CPAS_FAST_AHB_CLK 16
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#define CAM_CC_CPAS_IFE_0_CLK 17
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#define CAM_CC_CPAS_IFE_1_CLK 18
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#define CAM_CC_CPAS_IFE_LITE_CLK 19
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#define CAM_CC_CPAS_IPE_NPS_CLK 20
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#define CAM_CC_CPAS_SFE_0_CLK 21
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#define CAM_CC_CPHY_RX_CLK_SRC 22
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#define CAM_CC_CSI0PHYTIMER_CLK 23
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#define CAM_CC_CSI0PHYTIMER_CLK_SRC 24
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#define CAM_CC_CSI1PHYTIMER_CLK 25
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#define CAM_CC_CSI1PHYTIMER_CLK_SRC 26
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#define CAM_CC_CSI2PHYTIMER_CLK 27
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#define CAM_CC_CSI2PHYTIMER_CLK_SRC 28
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#define CAM_CC_CSI3PHYTIMER_CLK 29
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#define CAM_CC_CSI3PHYTIMER_CLK_SRC 30
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#define CAM_CC_CSI4PHYTIMER_CLK 31
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#define CAM_CC_CSI4PHYTIMER_CLK_SRC 32
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#define CAM_CC_CSI5PHYTIMER_CLK 33
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#define CAM_CC_CSI5PHYTIMER_CLK_SRC 34
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#define CAM_CC_CSID_CLK 35
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#define CAM_CC_CSID_CLK_SRC 36
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#define CAM_CC_CSID_CSIPHY_RX_CLK 37
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#define CAM_CC_CSIPHY0_CLK 38
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#define CAM_CC_CSIPHY1_CLK 39
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#define CAM_CC_CSIPHY2_CLK 40
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#define CAM_CC_CSIPHY3_CLK 41
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#define CAM_CC_CSIPHY4_CLK 42
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#define CAM_CC_CSIPHY5_CLK 43
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#define CAM_CC_FAST_AHB_CLK_SRC 44
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#define CAM_CC_GDSC_CLK 45
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#define CAM_CC_ICP_AHB_CLK 46
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#define CAM_CC_ICP_CLK 47
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#define CAM_CC_ICP_CLK_SRC 48
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#define CAM_CC_IFE_0_CLK 49
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#define CAM_CC_IFE_0_CLK_SRC 50
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#define CAM_CC_IFE_0_DSP_CLK 51
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#define CAM_CC_IFE_0_FAST_AHB_CLK 52
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#define CAM_CC_IFE_1_CLK 53
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#define CAM_CC_IFE_1_CLK_SRC 54
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#define CAM_CC_IFE_1_DSP_CLK 55
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#define CAM_CC_IFE_1_FAST_AHB_CLK 56
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#define CAM_CC_IFE_LITE_AHB_CLK 57
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#define CAM_CC_IFE_LITE_CLK 58
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#define CAM_CC_IFE_LITE_CLK_SRC 59
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#define CAM_CC_IFE_LITE_CPHY_RX_CLK 60
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#define CAM_CC_IFE_LITE_CSID_CLK 61
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#define CAM_CC_IFE_LITE_CSID_CLK_SRC 62
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#define CAM_CC_IPE_NPS_AHB_CLK 63
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#define CAM_CC_IPE_NPS_CLK 64
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#define CAM_CC_IPE_NPS_CLK_SRC 65
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#define CAM_CC_IPE_NPS_FAST_AHB_CLK 66
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#define CAM_CC_IPE_PPS_CLK 67
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#define CAM_CC_IPE_PPS_FAST_AHB_CLK 68
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#define CAM_CC_JPEG_CLK 69
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#define CAM_CC_JPEG_CLK_SRC 70
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#define CAM_CC_MCLK0_CLK 71
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#define CAM_CC_MCLK0_CLK_SRC 72
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#define CAM_CC_MCLK1_CLK 73
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#define CAM_CC_MCLK1_CLK_SRC 74
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#define CAM_CC_MCLK2_CLK 75
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#define CAM_CC_MCLK2_CLK_SRC 76
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#define CAM_CC_MCLK3_CLK 77
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#define CAM_CC_MCLK3_CLK_SRC 78
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#define CAM_CC_MCLK4_CLK 79
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#define CAM_CC_MCLK4_CLK_SRC 80
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#define CAM_CC_MCLK5_CLK 81
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#define CAM_CC_MCLK5_CLK_SRC 82
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#define CAM_CC_MCLK6_CLK 83
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#define CAM_CC_MCLK6_CLK_SRC 84
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#define CAM_CC_MCLK7_CLK 85
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#define CAM_CC_MCLK7_CLK_SRC 86
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#define CAM_CC_PLL0 87
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#define CAM_CC_PLL0_OUT_EVEN 88
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#define CAM_CC_PLL0_OUT_ODD 89
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#define CAM_CC_PLL1 90
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#define CAM_CC_PLL1_OUT_EVEN 91
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#define CAM_CC_PLL2 92
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#define CAM_CC_PLL3 93
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#define CAM_CC_PLL3_OUT_EVEN 94
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#define CAM_CC_PLL4 95
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#define CAM_CC_PLL4_OUT_EVEN 96
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#define CAM_CC_PLL6 97
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#define CAM_CC_PLL6_OUT_EVEN 98
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#define CAM_CC_PLL8 99
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#define CAM_CC_PLL8_OUT_EVEN 100
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#define CAM_CC_SFE_0_CLK 101
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#define CAM_CC_SFE_0_CLK_SRC 102
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#define CAM_CC_SFE_0_FAST_AHB_CLK 103
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#define CAM_CC_SLEEP_CLK 104
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#define CAM_CC_SLEEP_CLK_SRC 105
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#define CAM_CC_SLOW_AHB_CLK_SRC 106
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#define CAM_CC_XO_CLK_SRC 107
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/* CAM_CC power domains */
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#define CAM_CC_BPS_GDSC 0
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#define CAM_CC_IFE_0_GDSC 1
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#define CAM_CC_IFE_1_GDSC 2
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#define CAM_CC_IPE_0_GDSC 3
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#define CAM_CC_SFE_0_GDSC 4
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#define CAM_CC_TITAN_TOP_GDSC 5
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/* CAM_CC resets */
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#define CAM_CC_BPS_BCR 0
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#define CAM_CC_ICP_BCR 1
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#define CAM_CC_IFE_0_BCR 2
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#define CAM_CC_IFE_1_BCR 3
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#define CAM_CC_IPE_0_BCR 4
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#define CAM_CC_SFE_0_BCR 5
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#endif
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