49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8550_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8550_H
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/* GPU_CC clocks */
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#define GPU_CC_AHB_CLK 0
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#define GPU_CC_CRC_AHB_CLK 1
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#define GPU_CC_CX_FF_CLK 2
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#define GPU_CC_CX_GMU_CLK 3
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#define GPU_CC_CXO_AON_CLK 4
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#define GPU_CC_CXO_CLK 5
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#define GPU_CC_DEMET_CLK 6
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#define GPU_CC_DEMET_DIV_CLK_SRC 7
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#define GPU_CC_FF_CLK_SRC 8
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#define GPU_CC_FREQ_MEASURE_CLK 9
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#define GPU_CC_GMU_CLK_SRC 10
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#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 11
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#define GPU_CC_HUB_AON_CLK 12
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#define GPU_CC_HUB_CLK_SRC 13
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#define GPU_CC_HUB_CX_INT_CLK 14
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#define GPU_CC_MEMNOC_GFX_CLK 15
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#define GPU_CC_MND1X_0_GFX3D_CLK 16
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#define GPU_CC_MND1X_1_GFX3D_CLK 17
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#define GPU_CC_PLL0 18
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#define GPU_CC_PLL1 19
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#define GPU_CC_SLEEP_CLK 20
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#define GPU_CC_XO_CLK_SRC 21
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#define GPU_CC_XO_DIV_CLK_SRC 22
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/* GPU_CC power domains */
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#define GPU_CC_CX_GDSC 0
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#define GPU_CC_GX_GDSC 1
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/* GPU_CC resets */
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#define GPUCC_GPU_CC_ACD_BCR 0
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#define GPUCC_GPU_CC_CX_BCR 1
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#define GPUCC_GPU_CC_FAST_HUB_BCR 2
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#define GPUCC_GPU_CC_FF_BCR 3
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#define GPUCC_GPU_CC_GFX3D_AON_BCR 4
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#define GPUCC_GPU_CC_GMU_BCR 5
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#define GPUCC_GPU_CC_GX_BCR 6
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#define GPUCC_GPU_CC_XO_BCR 7
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#endif
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