60 lines
2.0 KiB
C
60 lines
2.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com>
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* Copyright (c) 2024, David Wronek <david@mainlining.org>
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_DISPCC_SM7150_H
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#define _DT_BINDINGS_CLK_QCOM_DISPCC_SM7150_H
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/* DISPCC clock registers */
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#define DISPCC_PLL0 0
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#define DISPCC_MDSS_AHB_CLK 1
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#define DISPCC_MDSS_AHB_CLK_SRC 2
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#define DISPCC_MDSS_BYTE0_CLK 3
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#define DISPCC_MDSS_BYTE0_CLK_SRC 4
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#define DISPCC_MDSS_BYTE0_DIV_CLK_SRC 5
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#define DISPCC_MDSS_BYTE0_INTF_CLK 6
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#define DISPCC_MDSS_BYTE1_CLK 7
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#define DISPCC_MDSS_BYTE1_CLK_SRC 8
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#define DISPCC_MDSS_BYTE1_DIV_CLK_SRC 9
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#define DISPCC_MDSS_BYTE1_INTF_CLK 10
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#define DISPCC_MDSS_DP_AUX_CLK 11
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#define DISPCC_MDSS_DP_AUX_CLK_SRC 12
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#define DISPCC_MDSS_DP_CRYPTO_CLK 13
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#define DISPCC_MDSS_DP_CRYPTO_CLK_SRC 14
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#define DISPCC_MDSS_DP_LINK_CLK 15
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#define DISPCC_MDSS_DP_LINK_CLK_SRC 16
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#define DISPCC_MDSS_DP_LINK_INTF_CLK 17
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#define DISPCC_MDSS_DP_PIXEL1_CLK 18
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#define DISPCC_MDSS_DP_PIXEL1_CLK_SRC 19
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#define DISPCC_MDSS_DP_PIXEL_CLK 20
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#define DISPCC_MDSS_DP_PIXEL_CLK_SRC 21
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#define DISPCC_MDSS_ESC0_CLK 22
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#define DISPCC_MDSS_ESC0_CLK_SRC 23
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#define DISPCC_MDSS_ESC1_CLK 24
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#define DISPCC_MDSS_ESC1_CLK_SRC 25
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#define DISPCC_MDSS_MDP_CLK 26
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#define DISPCC_MDSS_MDP_CLK_SRC 27
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#define DISPCC_MDSS_MDP_LUT_CLK 28
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#define DISPCC_MDSS_NON_GDSC_AHB_CLK 29
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#define DISPCC_MDSS_PCLK0_CLK 30
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#define DISPCC_MDSS_PCLK0_CLK_SRC 31
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#define DISPCC_MDSS_PCLK1_CLK 32
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#define DISPCC_MDSS_PCLK1_CLK_SRC 33
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#define DISPCC_MDSS_ROT_CLK 34
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#define DISPCC_MDSS_ROT_CLK_SRC 35
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#define DISPCC_MDSS_RSCC_AHB_CLK 36
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#define DISPCC_MDSS_RSCC_VSYNC_CLK 37
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#define DISPCC_MDSS_VSYNC_CLK 38
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#define DISPCC_MDSS_VSYNC_CLK_SRC 39
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#define DISPCC_XO_CLK_SRC 40
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#define DISPCC_SLEEP_CLK 41
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#define DISPCC_SLEEP_CLK_SRC 42
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/* DISPCC GDSCR */
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#define MDSS_GDSC 0
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#endif
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