114 lines
3.6 KiB
C
114 lines
3.6 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com>
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_CAMCC_SM7150_H
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#define _DT_BINDINGS_CLK_QCOM_CAMCC_SM7150_H
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/* Hardware clocks */
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#define CAMCC_PLL0_OUT_EVEN 0
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#define CAMCC_PLL0_OUT_ODD 1
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#define CAMCC_PLL1_OUT_EVEN 2
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#define CAMCC_PLL2_OUT_EARLY 3
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#define CAMCC_PLL3_OUT_EVEN 4
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#define CAMCC_PLL4_OUT_EVEN 5
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/* CAMCC clock registers */
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#define CAMCC_PLL0 6
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#define CAMCC_PLL1 7
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#define CAMCC_PLL2 8
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#define CAMCC_PLL2_OUT_AUX 9
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#define CAMCC_PLL2_OUT_MAIN 10
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#define CAMCC_PLL3 11
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#define CAMCC_PLL4 12
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#define CAMCC_BPS_AHB_CLK 13
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#define CAMCC_BPS_AREG_CLK 14
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#define CAMCC_BPS_AXI_CLK 15
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#define CAMCC_BPS_CLK 16
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#define CAMCC_BPS_CLK_SRC 17
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#define CAMCC_CAMNOC_AXI_CLK 18
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#define CAMCC_CAMNOC_AXI_CLK_SRC 19
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#define CAMCC_CAMNOC_DCD_XO_CLK 20
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#define CAMCC_CCI_0_CLK 21
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#define CAMCC_CCI_0_CLK_SRC 22
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#define CAMCC_CCI_1_CLK 23
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#define CAMCC_CCI_1_CLK_SRC 24
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#define CAMCC_CORE_AHB_CLK 25
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#define CAMCC_CPAS_AHB_CLK 26
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#define CAMCC_CPHY_RX_CLK_SRC 27
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#define CAMCC_CSI0PHYTIMER_CLK 28
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#define CAMCC_CSI0PHYTIMER_CLK_SRC 29
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#define CAMCC_CSI1PHYTIMER_CLK 30
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#define CAMCC_CSI1PHYTIMER_CLK_SRC 31
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#define CAMCC_CSI2PHYTIMER_CLK 32
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#define CAMCC_CSI2PHYTIMER_CLK_SRC 33
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#define CAMCC_CSI3PHYTIMER_CLK 34
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#define CAMCC_CSI3PHYTIMER_CLK_SRC 35
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#define CAMCC_CSIPHY0_CLK 36
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#define CAMCC_CSIPHY1_CLK 37
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#define CAMCC_CSIPHY2_CLK 38
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#define CAMCC_CSIPHY3_CLK 39
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#define CAMCC_FAST_AHB_CLK_SRC 40
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#define CAMCC_FD_CORE_CLK 41
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#define CAMCC_FD_CORE_CLK_SRC 42
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#define CAMCC_FD_CORE_UAR_CLK 43
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#define CAMCC_ICP_AHB_CLK 44
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#define CAMCC_ICP_CLK 45
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#define CAMCC_ICP_CLK_SRC 46
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#define CAMCC_IFE_0_AXI_CLK 47
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#define CAMCC_IFE_0_CLK 48
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#define CAMCC_IFE_0_CLK_SRC 49
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#define CAMCC_IFE_0_CPHY_RX_CLK 50
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#define CAMCC_IFE_0_CSID_CLK 51
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#define CAMCC_IFE_0_CSID_CLK_SRC 52
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#define CAMCC_IFE_0_DSP_CLK 53
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#define CAMCC_IFE_1_AXI_CLK 54
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#define CAMCC_IFE_1_CLK 55
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#define CAMCC_IFE_1_CLK_SRC 56
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#define CAMCC_IFE_1_CPHY_RX_CLK 57
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#define CAMCC_IFE_1_CSID_CLK 58
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#define CAMCC_IFE_1_CSID_CLK_SRC 59
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#define CAMCC_IFE_1_DSP_CLK 60
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#define CAMCC_IFE_LITE_CLK 61
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#define CAMCC_IFE_LITE_CLK_SRC 62
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#define CAMCC_IFE_LITE_CPHY_RX_CLK 63
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#define CAMCC_IFE_LITE_CSID_CLK 64
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#define CAMCC_IFE_LITE_CSID_CLK_SRC 65
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#define CAMCC_IPE_0_AHB_CLK 66
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#define CAMCC_IPE_0_AREG_CLK 67
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#define CAMCC_IPE_0_AXI_CLK 68
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#define CAMCC_IPE_0_CLK 69
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#define CAMCC_IPE_0_CLK_SRC 70
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#define CAMCC_IPE_1_AHB_CLK 71
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#define CAMCC_IPE_1_AREG_CLK 72
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#define CAMCC_IPE_1_AXI_CLK 73
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#define CAMCC_IPE_1_CLK 74
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#define CAMCC_JPEG_CLK 75
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#define CAMCC_JPEG_CLK_SRC 76
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#define CAMCC_LRME_CLK 77
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#define CAMCC_LRME_CLK_SRC 78
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#define CAMCC_MCLK0_CLK 79
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#define CAMCC_MCLK0_CLK_SRC 80
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#define CAMCC_MCLK1_CLK 81
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#define CAMCC_MCLK1_CLK_SRC 82
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#define CAMCC_MCLK2_CLK 83
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#define CAMCC_MCLK2_CLK_SRC 84
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#define CAMCC_MCLK3_CLK 85
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#define CAMCC_MCLK3_CLK_SRC 86
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#define CAMCC_SLEEP_CLK 87
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#define CAMCC_SLEEP_CLK_SRC 88
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#define CAMCC_SLOW_AHB_CLK_SRC 89
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#define CAMCC_XO_CLK_SRC 90
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/* CAMCC GDSCRs */
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#define BPS_GDSC 0
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#define IFE_0_GDSC 1
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#define IFE_1_GDSC 2
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#define IPE_0_GDSC 3
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#define IPE_1_GDSC 4
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#define TITAN_TOP_GDSC 5
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#endif
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