319 lines
7.0 KiB
C
319 lines
7.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* lis3lv02d.h - ST LIS3LV02DL accelerometer driver
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*
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* Copyright (C) 2007-2008 Yan Burman
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* Copyright (C) 2008-2009 Eric Piel
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*/
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/regulator/consumer.h>
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#include <linux/miscdevice.h>
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/*
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* This driver tries to support the "digital" accelerometer chips from
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* STMicroelectronics such as LIS3LV02DL, LIS302DL, LIS3L02DQ, LIS331DL,
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* LIS331DLH, LIS35DE, or LIS202DL. They are very similar in terms of
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* programming, with almost the same registers. In addition to differing
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* on physical properties, they differ on the number of axes (2/3),
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* precision (8/12 bits), and special features (freefall detection,
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* click...). Unfortunately, not all the differences can be probed via
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* a register. They can be connected either via I²C or SPI.
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*/
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#include <linux/lis3lv02d.h>
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enum lis3_reg {
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WHO_AM_I = 0x0F,
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OFFSET_X = 0x16,
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OFFSET_Y = 0x17,
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OFFSET_Z = 0x18,
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GAIN_X = 0x19,
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GAIN_Y = 0x1A,
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GAIN_Z = 0x1B,
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CTRL_REG1 = 0x20,
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CTRL_REG2 = 0x21,
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CTRL_REG3 = 0x22,
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CTRL_REG4 = 0x23,
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HP_FILTER_RESET = 0x23,
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STATUS_REG = 0x27,
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OUTX_L = 0x28,
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OUTX_H = 0x29,
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OUTX = 0x29,
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OUTY_L = 0x2A,
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OUTY_H = 0x2B,
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OUTY = 0x2B,
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OUTZ_L = 0x2C,
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OUTZ_H = 0x2D,
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OUTZ = 0x2D,
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};
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enum lis302d_reg {
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FF_WU_CFG_1 = 0x30,
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FF_WU_SRC_1 = 0x31,
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FF_WU_THS_1 = 0x32,
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FF_WU_DURATION_1 = 0x33,
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FF_WU_CFG_2 = 0x34,
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FF_WU_SRC_2 = 0x35,
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FF_WU_THS_2 = 0x36,
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FF_WU_DURATION_2 = 0x37,
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CLICK_CFG = 0x38,
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CLICK_SRC = 0x39,
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CLICK_THSY_X = 0x3B,
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CLICK_THSZ = 0x3C,
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CLICK_TIMELIMIT = 0x3D,
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CLICK_LATENCY = 0x3E,
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CLICK_WINDOW = 0x3F,
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};
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enum lis3lv02d_reg {
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FF_WU_CFG = 0x30,
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FF_WU_SRC = 0x31,
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FF_WU_ACK = 0x32,
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FF_WU_THS_L = 0x34,
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FF_WU_THS_H = 0x35,
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FF_WU_DURATION = 0x36,
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DD_CFG = 0x38,
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DD_SRC = 0x39,
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DD_ACK = 0x3A,
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DD_THSI_L = 0x3C,
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DD_THSI_H = 0x3D,
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DD_THSE_L = 0x3E,
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DD_THSE_H = 0x3F,
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};
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enum lis3_who_am_i {
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WAI_3DLH = 0x32, /* 16 bits: LIS331DLH */
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WAI_3DC = 0x33, /* 8 bits: LIS3DC, HP3DC */
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WAI_12B = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */
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WAI_8B = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */
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WAI_6B = 0x52, /* 6 bits: LIS331DLF - not supported */
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};
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enum lis3_type {
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LIS3LV02D,
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LIS3DC,
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HP3DC,
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LIS2302D,
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LIS331DLF,
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LIS331DLH,
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};
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enum lis3lv02d_ctrl1_12b {
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CTRL1_Xen = 0x01,
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CTRL1_Yen = 0x02,
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CTRL1_Zen = 0x04,
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CTRL1_ST = 0x08,
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CTRL1_DF0 = 0x10,
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CTRL1_DF1 = 0x20,
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CTRL1_PD0 = 0x40,
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CTRL1_PD1 = 0x80,
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};
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/* Delta to ctrl1_12b version */
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enum lis3lv02d_ctrl1_8b {
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CTRL1_STM = 0x08,
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CTRL1_STP = 0x10,
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CTRL1_FS = 0x20,
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CTRL1_PD = 0x40,
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CTRL1_DR = 0x80,
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};
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enum lis3lv02d_ctrl1_3dc {
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CTRL1_ODR0 = 0x10,
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CTRL1_ODR1 = 0x20,
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CTRL1_ODR2 = 0x40,
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CTRL1_ODR3 = 0x80,
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};
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enum lis331dlh_ctrl1 {
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CTRL1_DR0 = 0x08,
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CTRL1_DR1 = 0x10,
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CTRL1_PM0 = 0x20,
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CTRL1_PM1 = 0x40,
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CTRL1_PM2 = 0x80,
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};
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enum lis331dlh_ctrl2 {
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CTRL2_HPEN1 = 0x04,
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CTRL2_HPEN2 = 0x08,
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CTRL2_FDS_3DLH = 0x10,
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CTRL2_BOOT_3DLH = 0x80,
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};
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enum lis331dlh_ctrl4 {
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CTRL4_STSIGN = 0x08,
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CTRL4_BLE = 0x40,
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CTRL4_BDU = 0x80,
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};
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enum lis3lv02d_ctrl2 {
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CTRL2_DAS = 0x01,
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CTRL2_SIM = 0x02,
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CTRL2_DRDY = 0x04,
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CTRL2_IEN = 0x08,
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CTRL2_BOOT = 0x10,
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CTRL2_BLE = 0x20,
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CTRL2_BDU = 0x40, /* Block Data Update */
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CTRL2_FS = 0x80, /* Full Scale selection */
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};
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enum lis3lv02d_ctrl4_3dc {
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CTRL4_SIM = 0x01,
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CTRL4_ST0 = 0x02,
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CTRL4_ST1 = 0x04,
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CTRL4_FS0 = 0x10,
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CTRL4_FS1 = 0x20,
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};
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enum lis302d_ctrl2 {
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HP_FF_WU2 = 0x08,
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HP_FF_WU1 = 0x04,
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CTRL2_BOOT_8B = 0x40,
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};
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enum lis3lv02d_ctrl3 {
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CTRL3_CFS0 = 0x01,
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CTRL3_CFS1 = 0x02,
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CTRL3_FDS = 0x10,
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CTRL3_HPFF = 0x20,
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CTRL3_HPDD = 0x40,
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CTRL3_ECK = 0x80,
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};
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enum lis3lv02d_status_reg {
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STATUS_XDA = 0x01,
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STATUS_YDA = 0x02,
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STATUS_ZDA = 0x04,
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STATUS_XYZDA = 0x08,
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STATUS_XOR = 0x10,
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STATUS_YOR = 0x20,
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STATUS_ZOR = 0x40,
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STATUS_XYZOR = 0x80,
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};
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enum lis3lv02d_ff_wu_cfg {
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FF_WU_CFG_XLIE = 0x01,
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FF_WU_CFG_XHIE = 0x02,
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FF_WU_CFG_YLIE = 0x04,
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FF_WU_CFG_YHIE = 0x08,
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FF_WU_CFG_ZLIE = 0x10,
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FF_WU_CFG_ZHIE = 0x20,
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FF_WU_CFG_LIR = 0x40,
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FF_WU_CFG_AOI = 0x80,
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};
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enum lis3lv02d_ff_wu_src {
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FF_WU_SRC_XL = 0x01,
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FF_WU_SRC_XH = 0x02,
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FF_WU_SRC_YL = 0x04,
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FF_WU_SRC_YH = 0x08,
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FF_WU_SRC_ZL = 0x10,
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FF_WU_SRC_ZH = 0x20,
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FF_WU_SRC_IA = 0x40,
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};
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enum lis3lv02d_dd_cfg {
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DD_CFG_XLIE = 0x01,
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DD_CFG_XHIE = 0x02,
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DD_CFG_YLIE = 0x04,
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DD_CFG_YHIE = 0x08,
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DD_CFG_ZLIE = 0x10,
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DD_CFG_ZHIE = 0x20,
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DD_CFG_LIR = 0x40,
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DD_CFG_IEND = 0x80,
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};
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enum lis3lv02d_dd_src {
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DD_SRC_XL = 0x01,
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DD_SRC_XH = 0x02,
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DD_SRC_YL = 0x04,
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DD_SRC_YH = 0x08,
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DD_SRC_ZL = 0x10,
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DD_SRC_ZH = 0x20,
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DD_SRC_IA = 0x40,
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};
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enum lis3lv02d_click_src_8b {
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CLICK_SINGLE_X = 0x01,
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CLICK_DOUBLE_X = 0x02,
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CLICK_SINGLE_Y = 0x04,
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CLICK_DOUBLE_Y = 0x08,
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CLICK_SINGLE_Z = 0x10,
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CLICK_DOUBLE_Z = 0x20,
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CLICK_IA = 0x40,
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};
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enum lis3lv02d_reg_state {
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LIS3_REG_OFF = 0x00,
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LIS3_REG_ON = 0x01,
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};
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union axis_conversion {
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struct {
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int x, y, z;
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};
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int as_array[3];
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};
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struct lis3lv02d {
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void *bus_priv; /* used by the bus layer only */
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struct device *pm_dev; /* for pm_runtime purposes */
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int (*init) (struct lis3lv02d *lis3);
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int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
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int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
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int (*blkread) (struct lis3lv02d *lis3, int reg, int len, u8 *ret);
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int (*reg_ctrl) (struct lis3lv02d *lis3, bool state);
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int *odrs; /* Supported output data rates */
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u8 *regs; /* Regs to store / restore */
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int regs_size;
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u8 *reg_cache;
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bool regs_stored;
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u8 odr_mask; /* ODR bit mask */
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u8 whoami; /* indicates measurement precision */
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s16 (*read_data) (struct lis3lv02d *lis3, int reg);
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int mdps_max_val;
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int pwron_delay;
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int scale; /*
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* relationship between 1 LBS and mG
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* (1/1000th of earth gravity)
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*/
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struct input_dev *idev; /* input device */
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struct platform_device *pdev; /* platform device */
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struct regulator_bulk_data regulators[2];
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atomic_t count; /* interrupt count after last read */
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union axis_conversion ac; /* hw -> logical axis */
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int mapped_btns[3];
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u32 irq; /* IRQ number */
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struct fasync_struct *async_queue; /* queue for the misc device */
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wait_queue_head_t misc_wait; /* Wait queue for the misc device */
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unsigned long misc_opened; /* bit0: whether the device is open */
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struct miscdevice miscdev;
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int data_ready_count[2];
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atomic_t wake_thread;
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unsigned char irq_cfg;
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unsigned int shift_adj;
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struct lis3lv02d_platform_data *pdata; /* for passing board config */
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struct mutex mutex; /* Serialize poll and selftest */
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#ifdef CONFIG_OF
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struct device_node *of_node;
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#endif
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};
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int lis3lv02d_init_device(struct lis3lv02d *lis3);
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int lis3lv02d_joystick_enable(struct lis3lv02d *lis3);
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void lis3lv02d_joystick_disable(struct lis3lv02d *lis3);
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void lis3lv02d_poweroff(struct lis3lv02d *lis3);
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int lis3lv02d_poweron(struct lis3lv02d *lis3);
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void lis3lv02d_remove_fs(struct lis3lv02d *lis3);
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int lis3lv02d_init_dt(struct lis3lv02d *lis3);
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extern struct lis3lv02d lis3_dev;
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