303 lines
5.5 KiB
Plaintext
303 lines
5.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Zombie board device tree source
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*
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* Copyright 2022 Google LLC.
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*/
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#include "sc7280-herobrine.dtsi"
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#include "sc7280-herobrine-audio-rt5682.dtsi"
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/*
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* ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
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*
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* Sort order matches the order in the parent files (parents before children).
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*/
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&pp3300_codec {
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status = "okay";
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};
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/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
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ap_tp_i2c: &i2c0 {
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clock-frequency = <400000>;
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status = "okay";
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trackpad: trackpad@15 {
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compatible = "hid-over-i2c";
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reg = <0x15>;
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pinctrl-names = "default";
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pinctrl-0 = <&tp_int_odl>;
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interrupt-parent = <&tlmm>;
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interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
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hid-descr-addr = <0x01>;
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vdd-supply = <&pp3300_z1>;
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wakeup-source;
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};
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};
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&ap_sar_sensor_i2c {
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status = "okay";
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};
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&ap_sar_sensor0 {
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status = "okay";
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};
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&ap_sar_sensor1 {
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status = "okay";
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};
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&mdss_edp {
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status = "okay";
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};
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&mdss_edp_phy {
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status = "okay";
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};
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&pm8350c_pwm_backlight {
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/* Set the PWM period to 320 microseconds (3.125kHz frequency) */
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pwms = <&pm8350c_pwm 3 320000>;
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};
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&pwmleds {
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status = "okay";
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};
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/* For eMMC */
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&sdhc_1 {
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status = "okay";
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};
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/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
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&ts_rst_conn {
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bias-disable;
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};
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/* PINCTRL - BOARD-SPECIFIC */
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/*
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* Methodology for gpio-line-names:
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* - If a pin goes to herobrine board and is named it gets that name.
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* - If a pin goes to herobrine board and is not named, it gets no name.
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* - If a pin is totally internal to Qcard then it gets Qcard name.
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* - If a pin is not hooked up on Qcard, it gets no name.
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*/
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&pm8350c_gpios {
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gpio-line-names = "FLASH_STROBE_1", /* 1 */
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"AP_SUSPEND",
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"PM8008_1_RST_N",
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"",
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"",
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"",
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"PMIC_EDP_BL_EN",
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"PMIC_EDP_BL_PWM",
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"";
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};
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&tlmm {
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gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
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"AP_TP_I2C_SCL",
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"SSD_RST_L",
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"PE_WAKE_ODL",
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"AP_SAR_SDA",
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"AP_SAR_SCL",
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"PRB_SC_GPIO_6",
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"TP_INT_ODL",
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"HP_I2C_SDA",
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"HP_I2C_SCL",
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"GNSS_L1_EN", /* 10 */
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"GNSS_L5_EN",
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"SPI_AP_MOSI",
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"SPI_AP_MISO",
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"SPI_AP_CLK",
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"SPI_AP_CS0_L",
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/*
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* AP_FLASH_WP is crossystem ABI. Schematics
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* call it BIOS_FLASH_WP_OD.
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*/
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"AP_FLASH_WP",
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"",
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"AP_EC_INT_L",
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"",
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"UF_CAM_RST_L", /* 20 */
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"WF_CAM_RST_L",
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"UART_AP_TX_DBG_RX",
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"UART_DBG_TX_AP_RX",
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"",
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"PM8008_IRQ_1",
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"HOST2WLAN_SOL",
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"WLAN2HOST_SOL",
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"MOS_BT_UART_CTS",
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"MOS_BT_UART_RFR",
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"MOS_BT_UART_TX", /* 30 */
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"MOS_BT_UART_RX",
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"PRB_SC_GPIO_32",
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"HUB_RST_L",
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"",
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"",
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"AP_SPI_FP_MISO",
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"AP_SPI_FP_MOSI",
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"AP_SPI_FP_CLK",
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"AP_SPI_FP_CS_L",
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"AP_EC_SPI_MISO", /* 40 */
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"AP_EC_SPI_MOSI",
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"AP_EC_SPI_CLK",
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"AP_EC_SPI_CS_L",
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"LCM_RST_L",
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"EARLY_EUD_N",
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"",
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"DP_HOT_PLUG_DET",
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"IO_BRD_MLB_ID0",
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"IO_BRD_MLB_ID1",
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"IO_BRD_MLB_ID2", /* 50 */
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"SSD_EN",
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"TS_I2C_SDA_CONN",
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"TS_I2C_CLK_CONN",
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"TS_RST_CONN",
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"TS_INT_CONN",
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"AP_I2C_TPM_SDA",
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"AP_I2C_TPM_SCL",
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"PRB_SC_GPIO_58",
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"PRB_SC_GPIO_59",
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"EDP_HOT_PLUG_DET_N", /* 60 */
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"FP_TO_AP_IRQ_L",
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"",
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"AMP_EN",
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"CAM0_MCLK_GPIO_64",
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"CAM1_MCLK_GPIO_65",
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"WF_CAM_MCLK",
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"PRB_SC_GPIO_67",
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"FPMCU_BOOT0",
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"UF_CAM_SDA",
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"UF_CAM_SCL", /* 70 */
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"",
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"",
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"WF_CAM_SDA",
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"WF_CAM_SCL",
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"",
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"",
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"EN_FP_RAILS",
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"FP_RST_L",
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"PCIE1_CLKREQ_ODL",
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"EN_PP3300_DX_EDP", /* 80 */
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"US_EURO_HS_SEL",
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"FORCED_USB_BOOT",
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"WCD_RESET_N",
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"MOS_WLAN_EN",
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"MOS_BT_EN",
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"MOS_SW_CTRL",
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"MOS_PCIE0_RST",
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"MOS_PCIE0_CLKREQ_N",
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"MOS_PCIE0_WAKE_N",
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"MOS_LAA_AS_EN", /* 90 */
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"SD_CD_ODL",
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"",
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"",
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"MOS_BT_WLAN_SLIMBUS_CLK",
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"MOS_BT_WLAN_SLIMBUS_DAT0",
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"HP_MCLK",
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"HP_BCLK",
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"HP_DOUT",
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"HP_DIN",
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"HP_LRCLK", /* 100 */
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"HP_IRQ",
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"",
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"",
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"GSC_AP_INT_ODL",
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"EN_PP3300_CODEC",
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"AMP_BCLK",
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"AMP_DIN",
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"AMP_LRCLK",
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"UIM1_DATA_GPIO_109",
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"UIM1_CLK_GPIO_110", /* 110 */
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"UIM1_RESET_GPIO_111",
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"PRB_SC_GPIO_112",
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"UIM0_DATA",
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"UIM0_CLK",
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"UIM0_RST",
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"UIM0_PRESENT_ODL",
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"SDM_RFFE0_CLK",
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"SDM_RFFE0_DATA",
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"WF_CAM_EN",
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"FASTBOOT_SEL_0", /* 120 */
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"SC_GPIO_121",
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"FASTBOOT_SEL_1",
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"SC_GPIO_123",
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"FASTBOOT_SEL_2",
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"SM_RFFE4_CLK_GRFC_8",
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"SM_RFFE4_DATA_GRFC_9",
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"WLAN_COEX_UART1_RX",
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"WLAN_COEX_UART1_TX",
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"PRB_SC_GPIO_129",
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"LCM_ID0", /* 130 */
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"LCM_ID1",
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"",
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"SDR_QLINK_REQ",
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"SDR_QLINK_EN",
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"QLINK0_WMSS_RESET_N",
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"SMR526_QLINK1_REQ",
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"SMR526_QLINK1_EN",
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"SMR526_QLINK1_WMSS_RESET_N",
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"PRB_SC_GPIO_139",
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"SAR1_IRQ_ODL", /* 140 */
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"SAR0_IRQ_ODL",
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"PRB_SC_GPIO_142",
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"",
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"WCD_SWR_TX_CLK",
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"WCD_SWR_TX_DATA0",
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"WCD_SWR_TX_DATA1",
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"WCD_SWR_RX_CLK",
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"WCD_SWR_RX_DATA0",
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"WCD_SWR_RX_DATA1",
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"DMIC01_CLK", /* 150 */
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"DMIC01_DATA",
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"DMIC23_CLK",
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"DMIC23_DATA",
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"",
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"",
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"EC_IN_RW_ODL",
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"HUB_EN",
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"WCD_SWR_TX_DATA2",
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"",
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"", /* 160 */
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"", /* 170 */
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"MOS_BLE_UART_TX",
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"MOS_BLE_UART_RX",
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"",
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"";
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};
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