352 lines
7.3 KiB
Plaintext
352 lines
7.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2021 NXP
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* Copyright 2023 Variscite Ltd.
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*/
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include "imx93-var-som.dtsi"
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/{
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model = "Variscite VAR-SOM-MX93 on Symphony evaluation board";
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compatible = "variscite,var-som-mx93-symphony",
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"variscite,var-som-mx93", "fsl,imx93";
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aliases {
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ethernet0 = &eqos;
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ethernet1 = &fec;
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};
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chosen {
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stdout-path = &lpuart1;
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};
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/*
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* Needed only for Symphony <= v1.5
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*/
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reg_fec_phy: regulator-fec-phy {
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compatible = "regulator-fixed";
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regulator-name = "fec-phy";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <20000>;
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gpio = <&pca9534 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
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off-on-delay-us = <20000>;
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enable-active-high;
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};
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reg_vref_1v8: regulator-adc-vref {
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compatible = "regulator-fixed";
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regulator-name = "vref_1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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ethosu_mem: ethosu-region@88000000 {
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compatible = "shared-dma-pool";
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reusable;
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reg = <0x0 0x88000000 0x0 0x8000000>;
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};
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vdev0vring0: vdev0vring0@87ee0000 {
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reg = <0 0x87ee0000 0 0x8000>;
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no-map;
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};
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vdev0vring1: vdev0vring1@87ee8000 {
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reg = <0 0x87ee8000 0 0x8000>;
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no-map;
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};
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vdev1vring0: vdev1vring0@87ef0000 {
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reg = <0 0x87ef0000 0 0x8000>;
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no-map;
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};
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vdev1vring1: vdev1vring1@87ef8000 {
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reg = <0 0x87ef8000 0 0x8000>;
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no-map;
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};
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rsc_table: rsc-table@2021f000 {
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reg = <0 0x2021f000 0 0x1000>;
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no-map;
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};
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vdevbuffer: vdevbuffer@87f00000 {
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compatible = "shared-dma-pool";
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reg = <0 0x87f00000 0 0x100000>;
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no-map;
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};
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ele_reserved: ele-reserved@87de0000 {
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compatible = "shared-dma-pool";
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reg = <0 0x87de0000 0 0x100000>;
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no-map;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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key-back {
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label = "Back";
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gpios = <&pca9534 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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key-home {
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label = "Home";
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gpios = <&pca9534 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_HOME>;
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};
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key-menu {
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label = "Menu";
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gpios = <&pca9534 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_MENU>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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};
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/* Use external instead of internal RTC*/
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&bbnsm_rtc {
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status = "disabled";
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};
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&eqos {
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mdio {
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ethphy1: ethernet-phy@5 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <5>;
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qca,disable-smarteee;
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eee-broken-1000t;
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reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <20000>;
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vddio-supply = <&vddio1>;
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vddio1: vddio-regulator {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rgmii";
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phy-handle = <ðphy1>;
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phy-supply = <®_fec_phy>;
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status = "okay";
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&lpi2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "sleep", "gpio";
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pinctrl-0 = <&pinctrl_lpi2c1>;
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pinctrl-1 = <&pinctrl_lpi2c1_gpio>;
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pinctrl-2 = <&pinctrl_lpi2c1_gpio>;
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scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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/* DS1337 RTC module */
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rtc@68 {
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compatible = "dallas,ds1337";
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reg = <0x68>;
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};
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};
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&lpi2c5 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "sleep", "gpio";
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pinctrl-0 = <&pinctrl_lpi2c5>;
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pinctrl-1 = <&pinctrl_lpi2c5_gpio>;
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pinctrl-2 = <&pinctrl_lpi2c5_gpio>;
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scl-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
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status = "okay";
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pca9534: gpio@20 {
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compatible = "nxp,pca9534";
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reg = <0x20>;
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gpio-controller;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pca9534>;
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interrupt-parent = <&gpio3>;
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interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
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#gpio-cells = <2>;
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wakeup-source;
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};
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};
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/* Console */
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&lpuart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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/* J18.7, J18.9 */
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&lpuart6 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart6>;
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status = "okay";
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};
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/* SD */
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_usdhc2_vmmc>;
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bus-width = <4>;
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status = "okay";
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no-sdio;
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no-mmc;
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};
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/* Watchdog */
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&wdog3 {
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status = "okay";
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};
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&iomuxc {
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e
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MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e
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MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e
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MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e
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MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe
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MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e
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MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e
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MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e
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MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e
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MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e
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MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe
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MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX93_PAD_PDM_CLK__CAN1_TX 0x139e
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MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
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>;
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};
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pinctrl_lpi2c1: lpi2c1grp {
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fsl,pins = <
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MX93_PAD_I2C1_SCL__LPI2C1_SCL 0x40000b9e
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MX93_PAD_I2C1_SDA__LPI2C1_SDA 0x40000b9e
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>;
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};
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pinctrl_lpi2c1_gpio: lpi2c1gpiogrp {
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fsl,pins = <
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MX93_PAD_I2C1_SCL__GPIO1_IO00 0x31e
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MX93_PAD_I2C1_SDA__GPIO1_IO01 0x31e
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>;
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};
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pinctrl_lpi2c5: lpi2c5grp {
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fsl,pins = <
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MX93_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e
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MX93_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e
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>;
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};
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pinctrl_lpi2c5_gpio: lpi2c5gpiogrp {
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fsl,pins = <
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MX93_PAD_GPIO_IO23__GPIO2_IO23 0x31e
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MX93_PAD_GPIO_IO22__GPIO2_IO22 0x31e
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>;
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};
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pinctrl_pca9534: pca9534grp {
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fsl,pins = <
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MX93_PAD_CCM_CLKO1__GPIO3_IO26 0x31e
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
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MX93_PAD_UART1_TXD__LPUART1_TX 0x31e
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>;
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};
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pinctrl_uart6: uart6grp {
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fsl,pins = <
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MX93_PAD_GPIO_IO05__LPUART6_RX 0x31e
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MX93_PAD_GPIO_IO04__LPUART6_TX 0x31e
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>;
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};
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pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
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fsl,pins = <
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MX93_PAD_GPIO_IO18__GPIO2_IO18 0x31e
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
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MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe
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MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe
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MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe
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MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe
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MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe
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MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
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>;
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};
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pinctrl_usdhc2_gpio: usdhc2gpiogrp {
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fsl,pins = <
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MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
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>;
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};
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};
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