313 lines
8.4 KiB
C
313 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
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*
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* lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include <dt-bindings/sound/apq8016-lpass.h>
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#include "lpass-lpaif-reg.h"
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#include "lpass.h"
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static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = {
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[MI2S_PRIMARY] = {
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.id = MI2S_PRIMARY,
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.name = "Primary MI2S",
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.playback = {
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.stream_name = "Primary Playback",
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.formats = SNDRV_PCM_FMTBIT_S16 |
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SNDRV_PCM_FMTBIT_S24 |
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SNDRV_PCM_FMTBIT_S32,
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.rates = SNDRV_PCM_RATE_8000 |
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SNDRV_PCM_RATE_16000 |
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SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.channels_min = 1,
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.channels_max = 8,
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},
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.probe = &asoc_qcom_lpass_cpu_dai_probe,
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.ops = &asoc_qcom_lpass_cpu_dai_ops,
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},
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[MI2S_SECONDARY] = {
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.id = MI2S_SECONDARY,
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.name = "Secondary MI2S",
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.playback = {
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.stream_name = "Secondary Playback",
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.formats = SNDRV_PCM_FMTBIT_S16 |
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SNDRV_PCM_FMTBIT_S24 |
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SNDRV_PCM_FMTBIT_S32,
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.rates = SNDRV_PCM_RATE_8000 |
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SNDRV_PCM_RATE_16000 |
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SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.channels_min = 1,
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.channels_max = 8,
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},
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.probe = &asoc_qcom_lpass_cpu_dai_probe,
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.ops = &asoc_qcom_lpass_cpu_dai_ops,
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},
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[MI2S_TERTIARY] = {
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.id = MI2S_TERTIARY,
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.name = "Tertiary MI2S",
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.capture = {
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.stream_name = "Tertiary Capture",
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.formats = SNDRV_PCM_FMTBIT_S16 |
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SNDRV_PCM_FMTBIT_S24 |
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SNDRV_PCM_FMTBIT_S32,
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.rates = SNDRV_PCM_RATE_8000 |
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SNDRV_PCM_RATE_16000 |
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SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.channels_min = 1,
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.channels_max = 8,
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},
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.probe = &asoc_qcom_lpass_cpu_dai_probe,
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.ops = &asoc_qcom_lpass_cpu_dai_ops,
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},
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[MI2S_QUATERNARY] = {
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.id = MI2S_QUATERNARY,
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.name = "Quatenary MI2S",
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.playback = {
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.stream_name = "Quatenary Playback",
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.formats = SNDRV_PCM_FMTBIT_S16 |
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SNDRV_PCM_FMTBIT_S24 |
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SNDRV_PCM_FMTBIT_S32,
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.rates = SNDRV_PCM_RATE_8000 |
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SNDRV_PCM_RATE_16000 |
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SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.channels_min = 1,
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.channels_max = 8,
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},
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.capture = {
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.stream_name = "Quatenary Capture",
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.formats = SNDRV_PCM_FMTBIT_S16 |
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SNDRV_PCM_FMTBIT_S24 |
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SNDRV_PCM_FMTBIT_S32,
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.rates = SNDRV_PCM_RATE_8000 |
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SNDRV_PCM_RATE_16000 |
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SNDRV_PCM_RATE_32000 |
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SNDRV_PCM_RATE_48000 |
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SNDRV_PCM_RATE_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.channels_min = 1,
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.channels_max = 8,
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},
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.probe = &asoc_qcom_lpass_cpu_dai_probe,
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.ops = &asoc_qcom_lpass_cpu_dai_ops,
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},
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};
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static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata,
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int direction)
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{
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struct lpass_variant *v = drvdata->variant;
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int chan = 0;
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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chan = find_first_zero_bit(&drvdata->dma_ch_bit_map,
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v->rdma_channels);
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if (chan >= v->rdma_channels)
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return -EBUSY;
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} else {
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chan = find_next_zero_bit(&drvdata->dma_ch_bit_map,
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v->wrdma_channel_start +
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v->wrdma_channels,
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v->wrdma_channel_start);
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if (chan >= v->wrdma_channel_start + v->wrdma_channels)
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return -EBUSY;
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}
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set_bit(chan, &drvdata->dma_ch_bit_map);
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return chan;
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}
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static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
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{
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clear_bit(chan, &drvdata->dma_ch_bit_map);
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return 0;
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}
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static int apq8016_lpass_init(struct platform_device *pdev)
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{
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struct lpass_data *drvdata = platform_get_drvdata(pdev);
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struct lpass_variant *variant = drvdata->variant;
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struct device *dev = &pdev->dev;
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int ret, i;
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drvdata->clks = devm_kcalloc(dev, variant->num_clks,
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sizeof(*drvdata->clks), GFP_KERNEL);
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if (!drvdata->clks)
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return -ENOMEM;
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drvdata->num_clks = variant->num_clks;
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for (i = 0; i < drvdata->num_clks; i++)
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drvdata->clks[i].id = variant->clk_name[i];
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ret = devm_clk_bulk_get(dev, drvdata->num_clks, drvdata->clks);
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if (ret) {
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dev_err(dev, "Failed to get clocks %d\n", ret);
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return ret;
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}
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ret = clk_bulk_prepare_enable(drvdata->num_clks, drvdata->clks);
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if (ret) {
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dev_err(dev, "apq8016 clk_enable failed\n");
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return ret;
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}
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drvdata->ahbix_clk = devm_clk_get(dev, "ahbix-clk");
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if (IS_ERR(drvdata->ahbix_clk)) {
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dev_err(dev, "error getting ahbix-clk: %ld\n",
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PTR_ERR(drvdata->ahbix_clk));
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ret = PTR_ERR(drvdata->ahbix_clk);
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goto err_ahbix_clk;
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}
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ret = clk_set_rate(drvdata->ahbix_clk, LPASS_AHBIX_CLOCK_FREQUENCY);
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if (ret) {
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dev_err(dev, "error setting rate on ahbix_clk: %d\n", ret);
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goto err_ahbix_clk;
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}
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dev_dbg(dev, "set ahbix_clk rate to %lu\n",
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clk_get_rate(drvdata->ahbix_clk));
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ret = clk_prepare_enable(drvdata->ahbix_clk);
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if (ret) {
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dev_err(dev, "error enabling ahbix_clk: %d\n", ret);
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goto err_ahbix_clk;
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}
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return 0;
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err_ahbix_clk:
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clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks);
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return ret;
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}
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static int apq8016_lpass_exit(struct platform_device *pdev)
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{
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struct lpass_data *drvdata = platform_get_drvdata(pdev);
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clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks);
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clk_disable_unprepare(drvdata->ahbix_clk);
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return 0;
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}
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static struct lpass_variant apq8016_data = {
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.i2sctrl_reg_base = 0x1000,
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.i2sctrl_reg_stride = 0x1000,
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.i2s_ports = 4,
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.irq_reg_base = 0x6000,
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.irq_reg_stride = 0x1000,
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.irq_ports = 3,
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.rdma_reg_base = 0x8400,
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.rdma_reg_stride = 0x1000,
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.rdma_channels = 2,
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.dmactl_audif_start = 1,
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.wrdma_reg_base = 0xB000,
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.wrdma_reg_stride = 0x1000,
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.wrdma_channel_start = 5,
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.wrdma_channels = 2,
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.loopback = REG_FIELD_ID(0x1000, 15, 15, 4, 0x1000),
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.spken = REG_FIELD_ID(0x1000, 14, 14, 4, 0x1000),
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.spkmode = REG_FIELD_ID(0x1000, 10, 13, 4, 0x1000),
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.spkmono = REG_FIELD_ID(0x1000, 9, 9, 4, 0x1000),
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.micen = REG_FIELD_ID(0x1000, 8, 8, 4, 0x1000),
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.micmode = REG_FIELD_ID(0x1000, 4, 7, 4, 0x1000),
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.micmono = REG_FIELD_ID(0x1000, 3, 3, 4, 0x1000),
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.wssrc = REG_FIELD_ID(0x1000, 2, 2, 4, 0x1000),
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.bitwidth = REG_FIELD_ID(0x1000, 0, 0, 4, 0x1000),
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.rdma_dyncclk = REG_FIELD_ID(0x8400, 12, 12, 2, 0x1000),
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.rdma_bursten = REG_FIELD_ID(0x8400, 11, 11, 2, 0x1000),
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.rdma_wpscnt = REG_FIELD_ID(0x8400, 8, 10, 2, 0x1000),
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.rdma_intf = REG_FIELD_ID(0x8400, 4, 7, 2, 0x1000),
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.rdma_fifowm = REG_FIELD_ID(0x8400, 1, 3, 2, 0x1000),
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.rdma_enable = REG_FIELD_ID(0x8400, 0, 0, 2, 0x1000),
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.wrdma_dyncclk = REG_FIELD_ID(0xB000, 12, 12, 2, 0x1000),
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.wrdma_bursten = REG_FIELD_ID(0xB000, 11, 11, 2, 0x1000),
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.wrdma_wpscnt = REG_FIELD_ID(0xB000, 8, 10, 2, 0x1000),
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.wrdma_intf = REG_FIELD_ID(0xB000, 4, 7, 2, 0x1000),
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.wrdma_fifowm = REG_FIELD_ID(0xB000, 1, 3, 2, 0x1000),
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.wrdma_enable = REG_FIELD_ID(0xB000, 0, 0, 2, 0x1000),
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.clk_name = (const char*[]) {
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"pcnoc-mport-clk",
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"pcnoc-sway-clk",
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},
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.num_clks = 2,
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.dai_driver = apq8016_lpass_cpu_dai_driver,
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.num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
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.dai_osr_clk_names = (const char *[]) {
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"mi2s-osr-clk0",
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"mi2s-osr-clk1",
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"mi2s-osr-clk2",
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"mi2s-osr-clk3",
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},
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.dai_bit_clk_names = (const char *[]) {
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"mi2s-bit-clk0",
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"mi2s-bit-clk1",
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"mi2s-bit-clk2",
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"mi2s-bit-clk3",
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},
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.init = apq8016_lpass_init,
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.exit = apq8016_lpass_exit,
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.alloc_dma_channel = apq8016_lpass_alloc_dma_channel,
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.free_dma_channel = apq8016_lpass_free_dma_channel,
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};
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static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
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{ .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
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{}
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};
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MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id);
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static struct platform_driver apq8016_lpass_cpu_platform_driver = {
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.driver = {
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.name = "apq8016-lpass-cpu",
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.of_match_table = of_match_ptr(apq8016_lpass_cpu_device_id),
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},
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.probe = asoc_qcom_lpass_cpu_platform_probe,
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.remove = asoc_qcom_lpass_cpu_platform_remove,
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};
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module_platform_driver(apq8016_lpass_cpu_platform_driver);
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MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
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MODULE_LICENSE("GPL v2");
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