280 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			280 lines
		
	
	
		
			8.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| 
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| #include <linux/stringify.h>
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| #include <linux/linkage.h>
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| #include <asm/dwarf2.h>
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| #include <asm/cpufeatures.h>
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| #include <asm/alternative.h>
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| #include <asm/export.h>
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| #include <asm/nospec-branch.h>
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| #include <asm/nops.h>
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| 
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| .macro THUNK reg
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| 	.section .text..__x86.indirect_thunk
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| 
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| SYM_FUNC_START(__x86_indirect_thunk_\reg)
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| 	CFI_STARTPROC
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| 	JMP_NOSPEC %\reg
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| 	CFI_ENDPROC
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| SYM_FUNC_END(__x86_indirect_thunk_\reg)
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| .endm
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| 
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| .macro ANNOTATE_NOENDBR
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| .endm
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| 
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| /*
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|  * Despite being an assembler file we can't just use .irp here
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|  * because __KSYM_DEPS__ only uses the C preprocessor and would
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|  * only see one instance of "__x86_indirect_thunk_\reg" rather
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|  * than one per register with the correct names. So we do it
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|  * the simple and nasty way...
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|  */
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| #define __EXPORT_THUNK(sym) _ASM_NOKPROBE(sym); EXPORT_SYMBOL(sym)
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| #define EXPORT_THUNK(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg)
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| #define GENERATE_THUNK(reg) THUNK reg ; EXPORT_THUNK(reg)
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| 
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| GENERATE_THUNK(_ASM_AX)
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| GENERATE_THUNK(_ASM_BX)
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| GENERATE_THUNK(_ASM_CX)
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| GENERATE_THUNK(_ASM_DX)
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| GENERATE_THUNK(_ASM_SI)
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| GENERATE_THUNK(_ASM_DI)
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| GENERATE_THUNK(_ASM_BP)
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| #ifdef CONFIG_64BIT
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| GENERATE_THUNK(r8)
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| GENERATE_THUNK(r9)
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| GENERATE_THUNK(r10)
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| GENERATE_THUNK(r11)
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| GENERATE_THUNK(r12)
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| GENERATE_THUNK(r13)
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| GENERATE_THUNK(r14)
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| GENERATE_THUNK(r15)
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| #endif
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| 
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| #ifdef CONFIG_RETHUNK
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| 
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| /*
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|  * Be careful here: that label cannot really be removed because in
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|  * some configurations and toolchains, the JMP __x86_return_thunk the
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|  * compiler issues is either a short one or the compiler doesn't use
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|  * relocations for same-section JMPs and that breaks the returns
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|  * detection logic in apply_returns() and in objtool.
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|  */
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| 	.section .text..__x86.return_thunk
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| 
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| #ifdef CONFIG_CPU_SRSO
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| 
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| /*
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|  * srso_alias_untrain_ret() and srso_alias_safe_ret() are placed at
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|  * special addresses:
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|  *
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|  * - srso_alias_untrain_ret() is 2M aligned
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|  * - srso_alias_safe_ret() is also in the same 2M page but bits 2, 8, 14
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|  * and 20 in its virtual address are set (while those bits in the
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|  * srso_alias_untrain_ret() function are cleared).
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|  *
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|  * This guarantees that those two addresses will alias in the branch
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|  * target buffer of Zen3/4 generations, leading to any potential
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|  * poisoned entries at that BTB slot to get evicted.
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|  *
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|  * As a result, srso_alias_safe_ret() becomes a safe return.
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|  */
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| 	.pushsection .text..__x86.rethunk_untrain
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| SYM_CODE_START_NOALIGN(srso_alias_untrain_ret)
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| 	UNWIND_HINT_FUNC
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| 	ANNOTATE_NOENDBR
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| 	ASM_NOP2
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| 	lfence
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| 	jmp srso_alias_return_thunk
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| SYM_FUNC_END(srso_alias_untrain_ret)
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| 	.popsection
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| 
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| 	.pushsection .text..__x86.rethunk_safe
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| SYM_CODE_START_NOALIGN(srso_alias_safe_ret)
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| 	lea 8(%_ASM_SP), %_ASM_SP
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| 	UNWIND_HINT_FUNC
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| 	ANNOTATE_UNRET_SAFE
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| 	ret
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| 	int3
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| SYM_FUNC_END(srso_alias_safe_ret)
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| 
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| SYM_CODE_START_NOALIGN(srso_alias_return_thunk)
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| 	UNWIND_HINT_FUNC
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| 	ANNOTATE_NOENDBR
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| 	call srso_alias_safe_ret
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| 	ud2
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| SYM_CODE_END(srso_alias_return_thunk)
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| 	.popsection
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| 
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| /*
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|  * SRSO untraining sequence for Zen1/2, similar to retbleed_untrain_ret()
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|  * above. On kernel entry, srso_untrain_ret() is executed which is a
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|  *
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|  * movabs $0xccccc30824648d48,%rax
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|  *
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|  * and when the return thunk executes the inner label srso_safe_ret()
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|  * later, it is a stack manipulation and a RET which is mispredicted and
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|  * thus a "safe" one to use.
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|  */
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| 	.align 64
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| 	.skip 64 - (srso_safe_ret - srso_untrain_ret), 0xcc
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| SYM_CODE_START_LOCAL_NOALIGN(srso_untrain_ret)
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| 	ANNOTATE_NOENDBR
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| 	.byte 0x48, 0xb8
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| 
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| /*
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|  * This forces the function return instruction to speculate into a trap
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|  * (UD2 in srso_return_thunk() below).  This RET will then mispredict
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|  * and execution will continue at the return site read from the top of
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|  * the stack.
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|  */
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| SYM_INNER_LABEL(srso_safe_ret, SYM_L_GLOBAL)
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| 	lea 8(%_ASM_SP), %_ASM_SP
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| 	ret
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| 	int3
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| 	int3
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| 	/* end of movabs */
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| 	lfence
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| 	call srso_safe_ret
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| 	ud2
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| SYM_CODE_END(srso_safe_ret)
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| SYM_FUNC_END(srso_untrain_ret)
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| 
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| SYM_CODE_START(srso_return_thunk)
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| 	UNWIND_HINT_FUNC
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| 	ANNOTATE_NOENDBR
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| 	call srso_safe_ret
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| 	ud2
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| SYM_CODE_END(srso_return_thunk)
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| 
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| #define JMP_SRSO_UNTRAIN_RET "jmp srso_untrain_ret"
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| #define JMP_SRSO_ALIAS_UNTRAIN_RET "jmp srso_alias_untrain_ret"
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| #else /* !CONFIG_CPU_SRSO */
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| #define JMP_SRSO_UNTRAIN_RET "ud2"
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| #define JMP_SRSO_ALIAS_UNTRAIN_RET "ud2"
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| #endif /* CONFIG_CPU_SRSO */
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| 
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| #ifdef CONFIG_CPU_UNRET_ENTRY
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| 
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| /*
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|  * Some generic notes on the untraining sequences:
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|  *
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|  * They are interchangeable when it comes to flushing potentially wrong
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|  * RET predictions from the BTB.
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|  *
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|  * The SRSO Zen1/2 (MOVABS) untraining sequence is longer than the
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|  * Retbleed sequence because the return sequence done there
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|  * (srso_safe_ret()) is longer and the return sequence must fully nest
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|  * (end before) the untraining sequence. Therefore, the untraining
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|  * sequence must fully overlap the return sequence.
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|  *
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|  * Regarding alignment - the instructions which need to be untrained,
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|  * must all start at a cacheline boundary for Zen1/2 generations. That
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|  * is, instruction sequences starting at srso_safe_ret() and
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|  * the respective instruction sequences at retbleed_return_thunk()
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|  * must start at a cacheline boundary.
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|  */
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| 
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| /*
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|  * Safety details here pertain to the AMD Zen{1,2} microarchitecture:
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|  * 1) The RET at retbleed_return_thunk must be on a 64 byte boundary, for
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|  *    alignment within the BTB.
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|  * 2) The instruction at retbleed_untrain_ret must contain, and not
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|  *    end with, the 0xc3 byte of the RET.
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|  * 3) STIBP must be enabled, or SMT disabled, to prevent the sibling thread
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|  *    from re-poisioning the BTB prediction.
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|  */
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| 	.align 64
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| 	.skip 64 - (retbleed_return_thunk - retbleed_untrain_ret), 0xcc
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| SYM_CODE_START_LOCAL_NOALIGN(retbleed_untrain_ret)
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| 	ANNOTATE_NOENDBR
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| 	/*
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| 	 * As executed from retbleed_untrain_ret, this is:
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| 	 *
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| 	 *   TEST $0xcc, %bl
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| 	 *   LFENCE
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| 	 *   JMP retbleed_return_thunk
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| 	 *
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| 	 * Executing the TEST instruction has a side effect of evicting any BTB
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| 	 * prediction (potentially attacker controlled) attached to the RET, as
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| 	 * retbleed_return_thunk + 1 isn't an instruction boundary at the moment.
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| 	 */
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| 	.byte	0xf6
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| 
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| 	/*
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| 	 * As executed from retbleed_return_thunk, this is a plain RET.
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| 	 *
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| 	 * As part of the TEST above, RET is the ModRM byte, and INT3 the imm8.
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| 	 *
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| 	 * We subsequently jump backwards and architecturally execute the RET.
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| 	 * This creates a correct BTB prediction (type=ret), but in the
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| 	 * meantime we suffer Straight Line Speculation (because the type was
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| 	 * no branch) which is halted by the INT3.
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| 	 *
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| 	 * With SMT enabled and STIBP active, a sibling thread cannot poison
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| 	 * RET's prediction to a type of its choice, but can evict the
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| 	 * prediction due to competitive sharing. If the prediction is
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| 	 * evicted, retbleed_return_thunk will suffer Straight Line Speculation
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| 	 * which will be contained safely by the INT3.
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| 	 */
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| SYM_INNER_LABEL(retbleed_return_thunk, SYM_L_GLOBAL)
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| 	ret
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| 	int3
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| SYM_CODE_END(retbleed_return_thunk)
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| 
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| 	/*
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| 	 * Ensure the TEST decoding / BTB invalidation is complete.
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| 	 */
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| 	lfence
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| 
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| 	/*
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| 	 * Jump back and execute the RET in the middle of the TEST instruction.
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| 	 * INT3 is for SLS protection.
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| 	 */
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| 	jmp retbleed_return_thunk
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| 	int3
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| SYM_FUNC_END(retbleed_untrain_ret)
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| 
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| #define JMP_RETBLEED_UNTRAIN_RET "jmp retbleed_untrain_ret"
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| #else /* !CONFIG_CPU_UNRET_ENTRY */
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| #define JMP_RETBLEED_UNTRAIN_RET "ud2"
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| #endif /* CONFIG_CPU_UNRET_ENTRY */
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| 
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| #if defined(CONFIG_CPU_UNRET_ENTRY) || defined(CONFIG_CPU_SRSO)
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| 
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| SYM_FUNC_START(entry_untrain_ret)
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| 	ALTERNATIVE_2 JMP_RETBLEED_UNTRAIN_RET,				\
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| 		      JMP_SRSO_UNTRAIN_RET, X86_FEATURE_SRSO,		\
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| 		      JMP_SRSO_ALIAS_UNTRAIN_RET, X86_FEATURE_SRSO_ALIAS
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| SYM_FUNC_END(entry_untrain_ret)
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| __EXPORT_THUNK(entry_untrain_ret)
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| 
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| #endif /* CONFIG_CPU_UNRET_ENTRY || CONFIG_CPU_SRSO */
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| 
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| /*
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|  * This function name is magical and is used by -mfunction-return=thunk-extern
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|  * for the compiler to generate JMPs to it.
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|  *
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|  * This code is only used during kernel boot or module init.  All
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|  * 'JMP __x86_return_thunk' sites are changed to something else by
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|  * apply_returns().
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|  *
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|  * This should be converted eventually to call a warning function which
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|  * should scream loudly when the default return thunk is called after
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|  * alternatives have been applied.
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|  *
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|  * That warning function cannot BUG() because the bug splat cannot be
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|  * displayed in all possible configurations, leading to users not really
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|  * knowing why the machine froze.
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|  */
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| SYM_CODE_START(__x86_return_thunk)
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| 	UNWIND_HINT_FUNC
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| 	ANNOTATE_NOENDBR
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| 	ANNOTATE_UNRET_SAFE
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| 	ret
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| 	int3
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| SYM_CODE_END(__x86_return_thunk)
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| EXPORT_SYMBOL(__x86_return_thunk)
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| 
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| #endif /* CONFIG_RETHUNK */
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