677 lines
16 KiB
Plaintext
677 lines
16 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2016 Andreas Färber
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Copyright (c) 2016 Endless Computers, Inc.
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* Author: Carlo Caione <carlo@endlessm.com>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/meson-gxbb-power.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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mmc0 = &sd_emmc_b; /* SD card */
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mmc1 = &sd_emmc_c; /* eMMC */
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mmc2 = &sd_emmc_a; /* SDIO */
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* 16 MiB reserved for Hardware ROM Firmware */
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hwrom_reserved: hwrom@0 {
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reg = <0x0 0x0 0x0 0x1000000>;
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no-map;
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};
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/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
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secmon_reserved: secmon@10000000 {
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reg = <0x0 0x10000000 0x0 0x200000>;
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no-map;
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};
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/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
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secmon_reserved_alt: secmon@5000000 {
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reg = <0x0 0x05000000 0x0 0x300000>;
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no-map;
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};
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/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
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secmon_reserved_bl32: secmon@5300000 {
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reg = <0x0 0x05300000 0x0 0x2000000>;
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no-map;
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};
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x10000000>;
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alignment = <0x0 0x400000>;
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linux,cma-default;
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};
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};
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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simplefb_cvbs: framebuffer-cvbs {
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-cvbs";
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power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
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status = "disabled";
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};
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simplefb_hdmi: framebuffer-hdmi {
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-hdmi";
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power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
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status = "disabled";
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};
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};
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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#cooling-cells = <2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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#cooling-cells = <2>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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#cooling-cells = <2>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 0>;
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#cooling-cells = <2>;
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};
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l2: l2-cache0 {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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};
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};
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thermal-zones {
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cpu-thermal {
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polling-delay-passive = <250>; /* milliseconds */
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polling-delay = <1000>; /* milliseconds */
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thermal-sensors = <&scpi_sensors 0>;
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trips {
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cpu_passive: cpu-passive {
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temperature = <80000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "passive";
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};
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cpu_hot: cpu-hot {
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temperature = <90000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "hot";
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};
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cpu_critical: cpu-critical {
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temperature = <110000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "critical";
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};
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};
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cpu_cooling_maps: cooling-maps {
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map0 {
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trip = <&cpu_passive>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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map1 {
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trip = <&cpu_hot>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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};
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arm-pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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firmware {
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sm: secure-monitor {
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compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
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};
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};
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efuse: efuse {
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compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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secure-monitor = <&sm>;
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sn: sn@14 {
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reg = <0x14 0x10>;
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};
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eth_mac: eth-mac@34 {
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reg = <0x34 0x10>;
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};
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bid: bid@46 {
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reg = <0x46 0x30>;
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};
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};
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scpi {
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compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
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mboxes = <&mailbox 1 &mailbox 2>;
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shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
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scpi_clocks: clocks {
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compatible = "arm,scpi-clocks";
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scpi_dvfs: clocks-0 {
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compatible = "arm,scpi-dvfs-clocks";
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#clock-cells = <1>;
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clock-indices = <0>;
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clock-output-names = "vcpu";
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};
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};
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scpi_sensors: sensors {
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compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
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#thermal-sensor-cells = <1>;
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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cbus: bus@c1100000 {
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compatible = "simple-bus";
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reg = <0x0 0xc1100000 0x0 0x100000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
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gpio_intc: interrupt-controller@9880 {
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compatible = "amlogic,meson-gpio-intc";
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reg = <0x0 0x9880 0x0 0x10>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
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status = "disabled";
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};
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reset: reset-controller@4404 {
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compatible = "amlogic,meson-gxbb-reset";
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reg = <0x0 0x04404 0x0 0x9c>;
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#reset-cells = <1>;
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};
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aiu: audio-controller@5400 {
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compatible = "amlogic,aiu";
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#sound-dai-cells = <2>;
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sound-name-prefix = "AIU";
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reg = <0x0 0x5400 0x0 0x2ac>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "i2s", "spdif";
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status = "disabled";
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};
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uart_A: serial@84c0 {
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compatible = "amlogic,meson-gx-uart";
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reg = <0x0 0x84c0 0x0 0x18>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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fifo-size = <128>;
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};
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uart_B: serial@84dc {
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compatible = "amlogic,meson-gx-uart";
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reg = <0x0 0x84dc 0x0 0x18>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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i2c_A: i2c@8500 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x08500 0x0 0x20>;
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interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pwm_ab: pwm@8550 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08550 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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pwm_cd: pwm@8650 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x08650 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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saradc: adc@8680 {
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compatible = "amlogic,meson-saradc";
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reg = <0x0 0x8680 0x0 0x34>;
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#io-channel-cells = <1>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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pwm_ef: pwm@86c0 {
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compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
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reg = <0x0 0x086c0 0x0 0x10>;
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#pwm-cells = <3>;
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status = "disabled";
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};
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uart_C: serial@8700 {
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compatible = "amlogic,meson-gx-uart";
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reg = <0x0 0x8700 0x0 0x18>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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clock-measure@8758 {
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compatible = "amlogic,meson-gx-clk-measure";
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reg = <0x0 0x8758 0x0 0x10>;
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};
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i2c_B: i2c@87c0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087c0 0x0 0x20>;
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interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c_C: i2c@87e0 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x087e0 0x0 0x20>;
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interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spicc: spi@8d80 {
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compatible = "amlogic,meson-gx-spicc";
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reg = <0x0 0x08d80 0x0 0x80>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spifc: spi@8c80 {
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compatible = "amlogic,meson-gxbb-spifc";
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reg = <0x0 0x08c80 0x0 0x80>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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watchdog@98d0 {
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compatible = "amlogic,meson-gxbb-wdt";
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reg = <0x0 0x098d0 0x0 0x10>;
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clocks = <&xtal>;
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};
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};
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gic: interrupt-controller@c4301000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xc4301000 0 0x1000>,
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<0x0 0xc4302000 0 0x2000>,
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<0x0 0xc4304000 0 0x2000>,
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<0x0 0xc4306000 0 0x2000>;
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interrupt-controller;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
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#interrupt-cells = <3>;
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#address-cells = <0>;
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};
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sram: sram@c8000000 {
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compatible = "mmio-sram";
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reg = <0x0 0xc8000000 0x0 0x14000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0xc8000000 0x14000>;
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cpu_scp_lpri: scp-sram@0 {
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compatible = "amlogic,meson-gxbb-scp-shmem";
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reg = <0x13000 0x400>;
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};
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cpu_scp_hpri: scp-sram@200 {
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compatible = "amlogic,meson-gxbb-scp-shmem";
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reg = <0x13400 0x400>;
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};
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};
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aobus: bus@c8100000 {
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compatible = "simple-bus";
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reg = <0x0 0xc8100000 0x0 0x100000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
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sysctrl_AO: sys-ctrl@0 {
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compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
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reg = <0x0 0x0 0x0 0x100>;
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clkc_AO: clock-controller {
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compatible = "amlogic,meson-gx-aoclkc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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};
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cec_AO: cec@100 {
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compatible = "amlogic,meson-gx-ao-cec";
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reg = <0x0 0x00100 0x0 0x14>;
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interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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sec_AO: ao-secure@140 {
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compatible = "amlogic,meson-gx-ao-secure", "syscon";
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reg = <0x0 0x140 0x0 0x140>;
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amlogic,has-chip-id;
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};
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uart_AO: serial@4c0 {
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compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
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reg = <0x0 0x004c0 0x0 0x18>;
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interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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uart_AO_B: serial@4e0 {
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compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
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reg = <0x0 0x004e0 0x0 0x18>;
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interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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i2c_AO: i2c@500 {
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compatible = "amlogic,meson-gxbb-i2c";
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reg = <0x0 0x500 0x0 0x20>;
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interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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pwm_AO_ab: pwm@550 {
|
|
compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
|
|
reg = <0x0 0x00550 0x0 0x10>;
|
|
#pwm-cells = <3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ir: ir@580 {
|
|
compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
|
|
reg = <0x0 0x00580 0x0 0x40>;
|
|
interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
vdec: video-codec@c8820000 {
|
|
compatible = "amlogic,gx-vdec";
|
|
reg = <0x0 0xc8820000 0x0 0x10000>,
|
|
<0x0 0xc110a580 0x0 0xe4>;
|
|
reg-names = "dos", "esparser";
|
|
|
|
interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
|
|
<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "vdec", "esparser";
|
|
|
|
amlogic,ao-sysctrl = <&sysctrl_AO>;
|
|
amlogic,canvas = <&canvas>;
|
|
};
|
|
|
|
periphs: bus@c8834000 {
|
|
compatible = "simple-bus";
|
|
reg = <0x0 0xc8834000 0x0 0x2000>;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
|
|
|
|
hwrng: rng@0 {
|
|
compatible = "amlogic,meson-rng";
|
|
reg = <0x0 0x0 0x0 0x4>;
|
|
};
|
|
};
|
|
|
|
dmcbus: bus@c8838000 {
|
|
compatible = "simple-bus";
|
|
reg = <0x0 0xc8838000 0x0 0x400>;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
|
|
|
|
canvas: video-lut@48 {
|
|
compatible = "amlogic,canvas";
|
|
reg = <0x0 0x48 0x0 0x14>;
|
|
};
|
|
};
|
|
|
|
hiubus: bus@c883c000 {
|
|
compatible = "simple-bus";
|
|
reg = <0x0 0xc883c000 0x0 0x2000>;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
|
|
|
|
sysctrl: system-controller@0 {
|
|
compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
|
|
reg = <0 0 0 0x400>;
|
|
|
|
pwrc: power-controller {
|
|
compatible = "amlogic,meson-gxbb-pwrc";
|
|
#power-domain-cells = <1>;
|
|
amlogic,ao-sysctrl = <&sysctrl_AO>;
|
|
};
|
|
};
|
|
|
|
mailbox: mailbox@404 {
|
|
compatible = "amlogic,meson-gxbb-mhu";
|
|
reg = <0 0x404 0 0x4c>;
|
|
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
|
|
<GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
|
|
<GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
|
|
#mbox-cells = <1>;
|
|
};
|
|
};
|
|
|
|
ethmac: ethernet@c9410000 {
|
|
compatible = "amlogic,meson-gxbb-dwmac",
|
|
"snps,dwmac-3.70a",
|
|
"snps,dwmac";
|
|
reg = <0x0 0xc9410000 0x0 0x10000>,
|
|
<0x0 0xc8834540 0x0 0x4>;
|
|
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "macirq";
|
|
rx-fifo-depth = <4096>;
|
|
tx-fifo-depth = <2048>;
|
|
power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
|
|
status = "disabled";
|
|
};
|
|
|
|
apb: apb@d0000000 {
|
|
compatible = "simple-bus";
|
|
reg = <0x0 0xd0000000 0x0 0x200000>;
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
|
|
|
|
sd_emmc_a: mmc@70000 {
|
|
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
|
|
reg = <0x0 0x70000 0x0 0x800>;
|
|
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sd_emmc_b: mmc@72000 {
|
|
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
|
|
reg = <0x0 0x72000 0x0 0x800>;
|
|
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sd_emmc_c: mmc@74000 {
|
|
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
|
|
reg = <0x0 0x74000 0x0 0x800>;
|
|
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
vpu: vpu@d0100000 {
|
|
compatible = "amlogic,meson-gx-vpu";
|
|
reg = <0x0 0xd0100000 0x0 0x100000>,
|
|
<0x0 0xc883c000 0x0 0x1000>;
|
|
reg-names = "vpu", "hhi";
|
|
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
amlogic,canvas = <&canvas>;
|
|
|
|
/* CVBS VDAC output port */
|
|
cvbs_vdac_port: port@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
/* HDMI-TX output port */
|
|
hdmi_tx_port: port@1 {
|
|
reg = <1>;
|
|
|
|
hdmi_tx_out: endpoint {
|
|
remote-endpoint = <&hdmi_tx_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
hdmi_tx: hdmi-tx@c883a000 {
|
|
compatible = "amlogic,meson-gx-dw-hdmi";
|
|
reg = <0x0 0xc883a000 0x0 0x1c>;
|
|
interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
#sound-dai-cells = <0>;
|
|
sound-name-prefix = "HDMITX";
|
|
status = "disabled";
|
|
|
|
/* VPU VENC Input */
|
|
hdmi_tx_venc_port: port@0 {
|
|
reg = <0>;
|
|
|
|
hdmi_tx_in: endpoint {
|
|
remote-endpoint = <&hdmi_tx_out>;
|
|
};
|
|
};
|
|
|
|
/* TMDS Output */
|
|
hdmi_tx_tmds_port: port@1 {
|
|
reg = <1>;
|
|
};
|
|
};
|
|
};
|
|
};
|