81 lines
2.0 KiB
Plaintext
81 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2024 Amlogic, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gic: interrupt-controller@fff01000 {
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compatible = "arm,gic-400";
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reg = <0x0 0xfff01000 0 0x1000>,
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<0x0 0xfff02000 0 0x2000>,
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<0x0 0xfff04000 0 0x2000>,
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<0x0 0xfff06000 0 0x2000>;
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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apb: bus@fe000000 {
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compatible = "simple-bus";
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reg = <0x0 0xfe000000 0x0 0x480000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
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watchdog@2100 {
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compatible = "amlogic,a4-wdt", "amlogic,t7-wdt";
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reg = <0x0 0x2100 0x0 0x10>;
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clocks = <&xtal>;
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};
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uart_b: serial@7a000 {
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compatible = "amlogic,a4-uart",
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"amlogic,meson-s4-uart";
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reg = <0x0 0x7a000 0x0 0x18>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
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clocks = <&xtal>, <&xtal>, <&xtal>;
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clock-names = "xtal", "pclk", "baud";
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status = "disabled";
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};
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sec_ao: ao-secure@10220 {
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compatible = "amlogic,a4-ao-secure",
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"amlogic,meson-gx-ao-secure",
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"syscon";
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reg = <0x0 0x10220 0x0 0x140>;
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amlogic,has-chip-id;
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};
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};
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};
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};
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