723 lines
19 KiB
Plaintext
723 lines
19 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Toby Churchill - https://www.toby-churchill.com/
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* url above is defunct
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "Toby Churchill SL50 Series";
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compatible = "tcl,am335x-sl50", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&dcdc2_reg>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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chosen {
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stdout-path = &uart0;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pins>;
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led0 {
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label = "sl50:red:usr0";
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gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led1 {
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label = "sl50:green:usr1";
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gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led2 {
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label = "sl50:red:usr2";
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gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led3 {
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label = "sl50:green:usr3";
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gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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backlight0: disp0 {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&backlight0_pins>;
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pwms = <&ehrpwm1 0 500000 PWM_POLARITY_INVERTED>;
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brightness-levels = < 0 1 2 3 4 5 6 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100>;
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default-brightness-level = <50>;
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enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
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power-supply = <&vdd_sys_reg>;
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};
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backlight1: disp1 {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&backlight1_pins>;
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pwms = <&ehrpwm1 1 500000 PWM_POLARITY_INVERTED>;
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brightness-levels = < 0 1 2 3 4 5 6 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100>;
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default-brightness-level = <50>;
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enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
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power-supply = <&vdd_sys_reg>;
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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/* audio external oscillator */
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audio_mclk_fixed: oscillator@0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>; /* 24.576MHz */
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};
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audio_mclk: audio_mclk_gate@0 {
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compatible = "gpio-gate-clock";
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#clock-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&audio_mclk_pins>;
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clocks = <&audio_mclk_fixed>;
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enable-gpios = <&gpio1 27 0>;
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};
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};
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panel: lcd_panel {
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compatible = "ti,tilcdc,panel";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_pins>;
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panel-info {
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ac-bias = <255>;
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ac-bias-intrpt = <0>;
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dma-burst-sz = <16>;
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bpp = <16>;
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fdd = <0x80>;
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tft-alt-mode = <0>;
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mono-8bit-mode = <0>;
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sync-edge = <0>;
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sync-ctrl = <1>;
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raster-order = <0>;
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fifo-th = <0>;
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};
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display-timings {
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native-mode = <&timing0>;
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timing0: 960x128 {
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clock-frequency = <18000000>;
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hactive = <960>;
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vactive = <272>;
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hback-porch = <40>;
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hfront-porch = <16>;
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hsync-len = <24>;
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hsync-active = <0>;
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vback-porch = <3>;
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vfront-porch = <8>;
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vsync-len = <4>;
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vsync-active = <0>;
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};
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};
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};
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sound {
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compatible = "audio-graph-card";
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label = "sound-card";
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pinctrl-names = "default";
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pinctrl-0 = <&audio_pa_pins>;
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widgets = "Headphone", "Headphone Jack",
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"Speaker", "Speaker External",
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"Line", "Line In",
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"Microphone", "Microphone Jack";
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routing = "Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"Amplifier", "MONO_LOUT",
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"Speaker External", "Amplifier",
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"LINE1R", "Line In",
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"LINE1L", "Line In",
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"MIC3L", "Microphone Jack",
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"MIC3R", "Microphone Jack",
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"Microphone Jack", "Mic Bias";
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dais = <&cpu_port>;
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pa-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
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};
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emmc_pwrseq: pwrseq@0 {
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compatible = "mmc-pwrseq-emmc";
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_pwrseq_pins>;
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reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
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};
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vdd_sys_reg: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vdd_sys_reg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vmmcsd_fixed: fixedregulator0 {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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pinctrl-0 = <&lwb_pins>;
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audio_pins: audio-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
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>;
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};
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audio_pa_pins: audio-pa-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclkr.gpio3_18 */
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>;
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};
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audio_mclk_pins: audio-mclk-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 */
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>;
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};
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backlight0_pins: backlight0-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) /* gpmc_wen.gpio2_4 */
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>;
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};
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backlight1_pins: backlight1-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
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>;
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};
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lcd_pins: lcd-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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led_pins: led-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* gpmc_a5.gpio1_21 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* gpmc_a6.gpio1_22 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* gpmc_a7.gpio1_23 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* gpmc_a8.gpio1_24 */
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>;
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};
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uart0_pins: uart0-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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uart1_pins: uart1-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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uart4_pins: uart4-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* gpmc_wait0.uart4_rxd */
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AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* gpmc_wpn.uart4_txd */
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>;
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};
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i2c0_pins: i2c0-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
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>;
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};
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i2c2_pins: i2c2-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
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AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
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>;
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};
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cpsw_default: cpsw-default-pins {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
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>;
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};
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cpsw_sleep: cpsw-sleep-pins {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci-mdio-default-pins {
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pinctrl-single,pins = <
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/* MDIO */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
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/* Ethernet */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE7) /* Ethernet_nRST - gpmc_ad14.gpio1_14 */
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>;
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};
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davinci_mdio_sleep: davinci-mdio-sleep-pins {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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mmc1_pins: mmc1-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
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>;
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};
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emmc_pwrseq_pins: emmc-pwrseq-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a4.gpio1_20 */
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>;
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};
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emmc_pins: emmc-pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
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AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
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AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
|
|
>;
|
|
};
|
|
|
|
ehrpwm1_pins: ehrpwm1a-pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE6) /* gpmc_a2.ehrpwm1a */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.ehrpwm1b */
|
|
>;
|
|
};
|
|
|
|
rtc0_irq_pins: rtc0-irq-pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
|
|
>;
|
|
};
|
|
|
|
spi0_pins: spi0-pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MOSI */
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MISO */
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS0 (NBATTSS) */
|
|
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) */
|
|
>;
|
|
};
|
|
|
|
lwb_pins: lwb-pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
|
|
/* PDI Bus - Battery system */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
|
|
/* FPGA */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_DONE - gpmc_ad8.gpio0_22 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* FPGA_NRST - gpmc_a0.gpio1_16 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_RUN - gpmc_a1.gpio1_17 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLUP, MUX_MODE7) /* ENFPGA - gpmc_a9.gpio1_25 */
|
|
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7) /* FPGA_PROGRAM - gpmc_a10.gpio1_26 */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
tps: tps@24 {
|
|
reg = <0x24>;
|
|
};
|
|
|
|
rtc0: rtc@68 {
|
|
compatible = "dallas,ds1339";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rtc0_irq_pins>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <23 IRQ_TYPE_EDGE_FALLING>; /* gpio 23 */
|
|
wakeup-source;
|
|
trickle-resistor-ohms = <2000>;
|
|
reg = <0x68>;
|
|
};
|
|
|
|
eeprom: eeprom@50 {
|
|
compatible = "atmel,24c256";
|
|
reg = <0x50>;
|
|
};
|
|
|
|
gpio_exp: mcp23017@20 {
|
|
compatible = "microchip,mcp23017";
|
|
reg = <0x20>;
|
|
};
|
|
|
|
};
|
|
|
|
&i2c2 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c2_pins>;
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
audio_codec: tlv320aic3106@1b {
|
|
status = "okay";
|
|
compatible = "ti,tlv320aic3106";
|
|
#sound-dai-cells = <0>;
|
|
reg = <0x1b>;
|
|
ai3x-micbias-vg = <2>; /* 2.5V */
|
|
|
|
AVDD-supply = <&ldo4_reg>;
|
|
IOVDD-supply = <&ldo4_reg>;
|
|
DRVDD-supply = <&ldo4_reg>;
|
|
DVDD-supply = <&ldo3_reg>;
|
|
|
|
codec_port: port {
|
|
codec_endpoint: endpoint {
|
|
remote-endpoint = <&cpu_endpoint>;
|
|
clocks = <&audio_mclk>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* Ambient Light Sensor */
|
|
als: isl29023@44 {
|
|
compatible = "isil,isl29023";
|
|
reg = <0x44>;
|
|
};
|
|
};
|
|
|
|
&rtc {
|
|
status = "disabled";
|
|
};
|
|
|
|
&usb0 {
|
|
dr_mode = "otg";
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "host";
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
};
|
|
|
|
&mmc2 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&emmc_pins>;
|
|
bus-width = <8>;
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
mmc-pwrseq = <&emmc_pwrseq>;
|
|
};
|
|
|
|
&mcasp0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&audio_pins>;
|
|
#sound-dai-cells = <0>;
|
|
op-mode = <0>; /* MCASP_ISS_MODE */
|
|
tdm-slots = <2>;
|
|
/* 4 serializers */
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
0 0 1 2
|
|
>;
|
|
tx-num-evt = <32>;
|
|
rx-num-evt = <32>;
|
|
|
|
cpu_port: port {
|
|
cpu_endpoint: endpoint {
|
|
remote-endpoint = <&codec_endpoint>;
|
|
|
|
dai-format = "dsp_b";
|
|
bitclock-master = <&codec_port>;
|
|
frame-master = <&codec_port>;
|
|
bitclock-inversion;
|
|
clocks = <&audio_mclk>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins>;
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_pins>;
|
|
};
|
|
|
|
&uart4 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart4_pins>;
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_pins>;
|
|
|
|
flash: flash@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "micron,n25q032";
|
|
reg = <1>;
|
|
spi-max-frequency = <5000000>;
|
|
};
|
|
};
|
|
|
|
#include "../../tps65217.dtsi"
|
|
|
|
&tps {
|
|
ti,pmic-shutdown-controller;
|
|
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <7>; /* NNMI */
|
|
|
|
regulators {
|
|
dcdc1_reg: regulator@0 {
|
|
/* VDDS_DDR */
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc2_reg: regulator@1 {
|
|
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
|
regulator-name = "vdd_mpu";
|
|
regulator-min-microvolt = <925000>;
|
|
regulator-max-microvolt = <1325000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc3_reg: regulator@2 {
|
|
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
|
regulator-name = "vdd_core";
|
|
regulator-min-microvolt = <925000>;
|
|
regulator-max-microvolt = <1150000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo1_reg: regulator@3 {
|
|
/* VRTC / VIO / VDDS*/
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo2_reg: regulator@4 {
|
|
/* VDD_3V3AUX */
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
ldo3_reg: regulator@5 {
|
|
/* VDD_1V8 */
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo4_reg: regulator@6 {
|
|
/* VDD_3V3A */
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
&cpsw_port1 {
|
|
phy-mode = "mii";
|
|
phy-handle = <ðphy0>;
|
|
ti,dual-emac-pvid = <1>;
|
|
};
|
|
|
|
&cpsw_port2 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&mac_sw {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_default>;
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
};
|
|
|
|
&davinci_mdio_sw {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
|
|
reset-delay-us = <100>; /* PHY datasheet states 100us min */
|
|
|
|
ethphy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&sham {
|
|
status = "okay";
|
|
};
|
|
|
|
&aes {
|
|
status = "okay";
|
|
};
|
|
|
|
&epwmss1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ehrpwm1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ehrpwm1_pins>;
|
|
};
|
|
|
|
&lcdc {
|
|
status = "okay";
|
|
};
|
|
|
|
&tscadc {
|
|
status = "okay";
|
|
};
|
|
|
|
&am335x_adc {
|
|
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
|
};
|