37 lines
		
	
	
		
			730 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			37 lines
		
	
	
		
			730 B
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * Copyright (C) 2012 ST Microelectronics
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|  * Viresh Kumar <vireshk@kernel.org>
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|  *
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|  * SPEAr clk - Common routines
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|  */
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| 
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| #include <linux/clk-provider.h>
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| #include <linux/types.h>
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| #include "clk.h"
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| 
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| long clk_round_rate_index(struct clk_hw *hw, unsigned long drate,
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| 		unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt,
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| 		int *index)
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| {
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| 	unsigned long prev_rate, rate = 0;
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| 
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| 	for (*index = 0; *index < rtbl_cnt; (*index)++) {
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| 		prev_rate = rate;
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| 		rate = calc_rate(hw, parent_rate, *index);
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| 		if (drate < rate) {
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| 			/* previous clock was best */
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| 			if (*index) {
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| 				rate = prev_rate;
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| 				(*index)--;
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| 			}
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| 			break;
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| 		}
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| 	}
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| 
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| 	if ((*index) == rtbl_cnt)
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| 		(*index)--;
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| 
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| 	return rate;
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| }
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