44 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			44 lines
		
	
	
		
			1.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| /*
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|  * R-Car Gen4 System Controller
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|  *
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|  * Copyright (C) 2021 Renesas Electronics Corp.
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|  */
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| #ifndef __SOC_RENESAS_RCAR_GEN4_SYSC_H__
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| #define __SOC_RENESAS_RCAR_GEN4_SYSC_H__
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| 
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| #include <linux/types.h>
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| 
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| /*
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|  * Power Domain flags
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|  */
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| #define PD_CPU		BIT(0)	/* Area contains main CPU core */
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| #define PD_SCU		BIT(1)	/* Area contains SCU and L2 cache */
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| #define PD_NO_CR	BIT(2)	/* Area lacks PWR{ON,OFF}CR registers */
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| 
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| #define PD_CPU_NOCR	(PD_CPU | PD_NO_CR) /* CPU area lacks CR */
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| #define PD_ALWAYS_ON	PD_NO_CR	  /* Always-on area */
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| 
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| /*
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|  * Description of a Power Area
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|  */
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| struct rcar_gen4_sysc_area {
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| 	const char *name;
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| 	u8 pdr;			/* PDRn */
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| 	int parent;		/* -1 if none */
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| 	unsigned int flags;	/* See PD_* */
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| };
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| 
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| /*
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|  * SoC-specific Power Area Description
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|  */
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| struct rcar_gen4_sysc_info {
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| 	const struct rcar_gen4_sysc_area *areas;
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| 	unsigned int num_areas;
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| };
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| 
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| extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;
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| extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;
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| 
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| #endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */
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