271 lines
6.2 KiB
Plaintext
271 lines
6.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Copyright 2023 Mobileye Vision Technologies Ltd.
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*/
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#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
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/ {
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/* Fixed clock */
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xtal: xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <30000000>;
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};
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/* PLL_CPU derivatives */
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occ_cpu: occ-cpu {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_CPU>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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si_css0_ref_clk: si-css0-ref-clk { /* gate ClkRstGen_si_css0_ref */
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compatible = "fixed-factor-clock";
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clocks = <&occ_cpu>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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cpc_clk: cpc-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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core0_clk: core0-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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core1_clk: core1-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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core2_clk: core2-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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core3_clk: core3-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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cm_clk: cm-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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mem_clk: mem-clk {
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compatible = "fixed-factor-clock";
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clocks = <&si_css0_ref_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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occ_isram: occ-isram {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_CPU>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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isram_clk: isram-clk { /* gate ClkRstGen_isram */
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compatible = "fixed-factor-clock";
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clocks = <&occ_isram>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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occ_dbu: occ-dbu {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_CPU>;
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#clock-cells = <0>;
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clock-div = <10>;
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clock-mult = <1>;
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};
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si_dbu_tp_pclk: si-dbu-tp-pclk { /* gate ClkRstGen_dbu */
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compatible = "fixed-factor-clock";
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clocks = <&occ_dbu>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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/* PLL_VDI derivatives */
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occ_vdi: occ-vdi {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_VDI>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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vdi_clk: vdi-clk { /* gate ClkRstGen_vdi */
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compatible = "fixed-factor-clock";
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clocks = <&occ_vdi>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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occ_can_ser: occ-can-ser {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_VDI>;
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#clock-cells = <0>;
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clock-div = <16>;
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clock-mult = <1>;
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};
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can_ser_clk: can-ser-clk { /* gate ClkRstGen_can_ser */
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compatible = "fixed-factor-clock";
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clocks = <&occ_can_ser>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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i2c_ser_clk: i2c-ser-clk {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_VDI>;
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#clock-cells = <0>;
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clock-div = <20>;
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clock-mult = <1>;
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};
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/* PLL_PER derivatives */
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occ_periph: occ-periph {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <16>;
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clock-mult = <1>;
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};
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periph_clk: periph-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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can_clk: can-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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spi_clk: spi-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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uart_clk: uart-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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i2c_clk: i2c-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "i2c_clk";
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};
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timer_clk: timer-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "timer_clk";
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};
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gpio_clk: gpio-clk {
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compatible = "fixed-factor-clock";
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clocks = <&occ_periph>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "gpio_clk";
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};
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emmc_sys_clk: emmc-sys-clk {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <10>;
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clock-mult = <1>;
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clock-output-names = "emmc_sys_clk";
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};
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ccf_ctrl_clk: ccf-ctrl-clk {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <4>;
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clock-mult = <1>;
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clock-output-names = "ccf_ctrl_clk";
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};
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occ_mjpeg_core: occ-mjpeg-core {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <2>;
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clock-mult = <1>;
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clock-output-names = "occ_mjpeg_core";
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};
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hsm_clk: hsm-clk { /* gate ClkRstGen_hsm */
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compatible = "fixed-factor-clock";
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clocks = <&occ_mjpeg_core>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "hsm_clk";
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};
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mjpeg_core_clk: mjpeg-core-clk { /* gate ClkRstGen_mjpeg_gen */
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compatible = "fixed-factor-clock";
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clocks = <&occ_mjpeg_core>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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clock-output-names = "mjpeg_core_clk";
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};
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fcmu_a_clk: fcmu-a-clk {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <20>;
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clock-mult = <1>;
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clock-output-names = "fcmu_a_clk";
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};
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occ_pci_sys: occ-pci-sys {
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compatible = "fixed-factor-clock";
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clocks = <&olb EQ5C_PLL_PER>;
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#clock-cells = <0>;
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clock-div = <8>;
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clock-mult = <1>;
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clock-output-names = "occ_pci_sys";
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};
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pclk: pclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <250000000>; /* 250MHz */
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};
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tsu_clk: tsu-clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>; /* 125MHz */
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};
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};
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